MC56F8346MFVE Freescale Semiconductor, MC56F8346MFVE Datasheet - Page 115

IC DSP 16BIT 60MHZ 144-LQFP

MC56F8346MFVE

Manufacturer Part Number
MC56F8346MFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8346MFVE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
62
Data Ram Size
4 KB
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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6.5.2.5
When 1, the POR bit indicates a Power-On Reset occurred some time in the past. This bit can be cleared
only by software or by another type of reset. Writing a 0 to this bit will set the bit, while writing a 1 to the
bit position will clear the bit. In summary, if the bit is 1, the previous system reset was due to a Power-On
Reset.
6.5.2.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.3
Only SIM_SCR0 is shown below. SIM_SCR1, SIM_SCR2, and SIM_SCR3 are identical in functionality.
6.5.3.1
This register is reset only by the Power-On Reset (POR). It has no part-specific functionality and is
intended for use by a software developer to contain data that will be unaffected by the other reset sources
(RESET pin, software reset, and COP reset).
6.5.4
This read-only register displays the most significant half of the JTAG ID for the chip. This register reads
$11F4.
6.5.5
This read-only register displays the least significant half of the JTAG ID for the chip. This register reads
$401D.
Freescale Semiconductor
Preliminary
Base + $2
Base + $6
RESET
Read
Write
Read
Write
POR
SIM Software Control Registers (SIM_SCR0, SIM_SCR1, SIM_SCR2,
and SIM_SCR3)
Most Significant Half of JTAG ID (SIM_MSH_ID)
Least Significant Half of JTAG ID (SIM_LSH_ID)
Power-On Reset (POR)—Bit 2
Reserved—Bits 1–0
Software Control Data 1 (FIELD)—Bits 15–0
15
15
Figure 6-6 Most Significant Half of JTAG ID (SIM_MSH_ID)
0
0
0
Figure 6-5 SIM Software Control Register 0 (SIM_SCR0)
14
14
0
0
0
13
13
0
0
0
12
12
0
0
0
56F8346 Technical Data, Rev. 15
11
11
0
0
0
10
10
0
0
0
9
0
9
0
0
FIELD
8
8
0
1
1
7
7
0
1
1
6
6
0
1
1
5
0
5
1
1
4
0
4
1
1
3
3
0
0
0
2
0
2
1
1
Register Descriptions
1
0
1
0
0
0
0
0
0
0
115

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