MC56F8346MFVE Freescale Semiconductor, MC56F8346MFVE Datasheet - Page 148
![IC DSP 16BIT 60MHZ 144-LQFP](/photos/12/21/122157/mc56f8346mfve_sml.jpg)
MC56F8346MFVE
Manufacturer Part Number
MC56F8346MFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8346VFVE.pdf
(178 pages)
Specifications of MC56F8346MFVE
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
62
Data Ram Size
4 KB
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC56F8346MFVE
Manufacturer:
Freescale
Quantity:
42
Company:
Part Number:
MC56F8346MFVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8346MFVE
Manufacturer:
FREESCALE
Quantity:
20 000
and DCAEO are used to make this duty cycle adjustment where needed.
DCAOE and DCAEO are calculated as follows:
The timing of write cycles is different when WWS = 0 than when WWS > 0. Therefore, some parameters
contain two sets of numbers to account for this difference. Use the “Wait States Configuration” column of
Table 10-16
Note:
148
A0-Axx,CS
DCAOE =
DCAEO =
D0-D15
WR
RD
Note: During read-modify-write instructions and internal instructions, the address lines do not change state.
When multiple lines are given for the same wait state configuration, calculate each and then select the
smallest or most negative.
to make the appropriate selection.
=
=
Example of DCAOE and DCAEO calculation
Assuming prescaler is set for ÷ 1 and prescaler clock is selected by ZSRC, if XTAL duty cycle
ranges between 45% and 60% high:
DCAOE = .50 - .60 = - 0.1
DCAEO = .45 - .50 = - 0.05
0.5 - MAX XTAL duty cycle, if ZSRC selects prescaler clock and the prescaler is set to ÷ 1
0.0 all other cases
MIN XTAL duty cycle - 0.5, if ZSRC selects prescaler clock and the prescaler is set to ÷ 1
0.0 all other cases
t
Figure 10-4 External Memory Interface Timing
WRWR
t
AWR
t
DWR
t
Data Out
DOS
56F8346 Technical Data, Rev. 15
t
WR
t
DOH
t
WAC
t
WRRD
t
ARDA
t
AD
t
ARDD
t
RDD
t
RD
Data In
t
DRD
t
RDA
Freescale Semiconductor
t
RDRD
t
RDWR
Preliminary