DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 24
![IC H8S MCU FLASH 256K 120TQFP](/photos/12/21/122170/df2398te20v_sml.jpg)
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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14.4 SCI Interrupts ........................................................................................................................................................... 512
14.5 Usage Notes ..............................................................................................................................................................514
Section 15 Smart Card Interface.......................................................................................................517
15.1 Overview................................................................................................................................................................... 517
15.2 Register Descriptions................................................................................................................................................520
15.3 Operation ..................................................................................................................................................................524
15.4 Usage Notes ..............................................................................................................................................................535
Section 16 A/D Converter ................................................................................................................539
16.1 Overview................................................................................................................................................................... 539
16.2 Register Descriptions................................................................................................................................................542
16.3 Interface to Bus Master............................................................................................................................................. 546
16.4 Operation ..................................................................................................................................................................546
16.5 Interrupts................................................................................................................................................................... 550
16.6 Usage Notes ..............................................................................................................................................................551
Section 17 D/A Converter ................................................................................................................555
17.1 Overview................................................................................................................................................................... 555
17.2 Register Descriptions................................................................................................................................................557
Rev.6.00 Oct.28.2004 page xviii of xxiv
REJ09B0138-0600H
15.1.1 Features ....................................................................................................................................................... 517
15.1.2 Block Diagram............................................................................................................................................. 518
15.1.3 Pin Configuration ........................................................................................................................................518
15.1.4 Register Configuration ................................................................................................................................519
15.2.1 Smart Card Mode Register (SCMR) ........................................................................................................... 520
15.2.2 Serial Status Register (SSR)........................................................................................................................521
15.2.3 Serial Mode Register (SMR)....................................................................................................................... 522
15.2.4 Serial Control Register (SCR)..................................................................................................................... 523
15.3.1 Overview ..................................................................................................................................................... 524
15.3.2 Pin Connections........................................................................................................................................... 524
15.3.3 Data Format................................................................................................................................................. 525
15.3.4 Register Settings..........................................................................................................................................526
15.3.5 Clock ........................................................................................................................................................... 527
15.3.6 Data Transfer Operations ............................................................................................................................529
15.3.7 Operation in GSM Mode............................................................................................................................. 534
16.1.1 Features ....................................................................................................................................................... 539
16.1.2 Block Diagram............................................................................................................................................. 540
16.1.3 Pin Configuration ........................................................................................................................................540
16.1.4 Register Configuration ................................................................................................................................541
16.2.1 A/D Data Registers A to D (ADDRA to ADDRD)..................................................................................... 542
16.2.2 A/D Control/Status Register (ADCSR)....................................................................................................... 542
16.2.3 A/D Control Register (ADCR)....................................................................................................................544
16.2.4 Module Stop Control Register (MSTPCR) ................................................................................................. 545
16.4.1 Single Mode (SCAN = 0) ............................................................................................................................546
16.4.2 Scan Mode (SCAN = 1) ..............................................................................................................................548
16.4.3 Input Sampling and A/D Conversion Time................................................................................................. 549
16.4.4 External Trigger Input Timing ....................................................................................................................550
17.1.1 Features ....................................................................................................................................................... 555
17.1.2 Block Diagram............................................................................................................................................. 555
17.1.3 Pin Configuration ........................................................................................................................................556
17.1.4 Register Configuration ................................................................................................................................556
17.2.1 D/A Data Registers 0 and 1 (DADR0, DADR1)......................................................................................... 557
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