DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 881
![IC H8S MCU FLASH 256K 120TQFP](/photos/12/21/122170/df2398te20v_sml.jpg)
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 881 of 1049
- Download datasheet (5Mb)
TIOR3H—Timer I/O Control Register 3H
Initial value
Read/Write
Bit
:
:
:
TGR3B I/O Control
Note: * If bits TPSC2 to TPSC0 in TCR4 are set to B'000, and ø/1 is used as the
0
1
IOB3
R/W
7
0
0
1
0
1
TCNT4 count clock, this setting will be invalid and input capture will not
occur.
0
1
0
1
0
1
IOB2
R/W
6
0
0
1
0
1
0
1
0
1
0
1
TGR3B
is output
compare
register
TGR3B
is input
capture
register
IOB1
R/W
5
0
Output disabled
Initial output is
0 output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCB3 pin
Capture input
source is channel
4/count clock
IOB0
R/W
4
0
TGR3A I/O Control
0
1
H'FE82
0
1
0
1
IOA3
R/W
3
0
0
1
0
1
0
1
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT4 count-up/
count-down
0 output at compare match
0
1
0
1
0
1
0
1
0
1
IOA2
R/W
TGR3A
is output
compare
register
TGR3A
is input
capture
register
2
0
*
IOA1
R/W
Output disabled
Initial output is
0 output
Output disabled
Initial output is
1 output
Capture input
source is
TIOCA3 pin
Capture input
source is channel
4/count clock
1
0
: Don’t care
IOA0
R/W
0
0
Rev.6.00 Oct.28.2004 page 851 of 1016
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT4 count-up/
count-down
0 output at compare match
TPU3
: Don’t care
REJ09B0138-0600H
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