EP9315-CB Cirrus Logic Inc, EP9315-CB Datasheet - Page 282

• Manufacturer Part Number: EP9315-CB
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CB

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1261

8
8-18
Graphics Accelerator
EP93xx User’s Guide
8.6.4 Block Copy Function
The following sequence describes how to set up the registers used for a Block Copy function:
7. Setup BLOCKCTRL Register
8. Wait for an Interrupt or Poll for EN = ‘0’ in the BLOCKCTRL Register.
1. Setup Source Memory
EPEL is the ending pixel position within the word that the pixel-copy will end with. See
Section
bits, the value for SPEL is (51 x 16)% 32 = 16 = 0x10 and the value for EPEL is (75 x
16)% 32 = 16 = 0x10
For (example) 16-bit pixels and Mask AND Mode:
When the EN bit becomes cleared to ‘0’, the Block Fill Algorithm function is complete.
SPEL is the starting pixel position within the word that the pixel-copy will begin with.
For example, if the image to be copied is at position (51, 75) and the pixel depth is 16-
A. Clear the
B. Write Fill = ‘1’, BG = ‘0’, M = 0x1, P = 0x4, and INTEN = ‘1’ to the
C. Write EN = ‘1’ to the
A. Write the desired values to the SPEL field and the EPEL field in the
B. Write the word-aligned value of the SDRAM address ‘for the beginning of the image
C. Write the line length value to the LEN field in the
D. Write the value of the WIDTH field to the
register
“SRCPIXELSTRT”
that is to be copied’ to the
where LEN is determined by:
is the number of 32-bit words, minus 1, that are needed to contain the pixels that
(1).Find how many pixels occupy a 32-bit word. For example, four 8-bit pixels can
(2).Find the width of the display in pixels. For example, a 640x480 display has a
(3).The line length, LEN, is determined by the stride of the display, that is, how
8.5.2.
width of 640 pixels.
many 32-bit words are needed to populate the width of the display with pixels.
From steps 1 and 2, the stride for this example is 640 pixels divided by 4,
where 4 is the number of 8-bit pixels that occupy a word. So, for this example,
line length is 640 divided by 4 = 160 = 0xA0.
occupy a 32-bit word.
Usually the same LEN value is used in both the
and the
“BLOCKCTRL”
“DESTLINELENGTH”
register.
“BLOCKCTRL”
Copyright 2007 Cirrus Logic
register by writing 0x0000_0000 to it
“BLKDESTSTRT”
register
register.
“BLKSRCWIDTH”
register.
“SRCLINELENGTH”
“SRCLINELENGTH”
register, where WIDTH
“BLOCKCTRL”
register,
DS785UM1
register