EP9315-CB Cirrus Logic Inc, EP9315-CB Datasheet - Page 349

IC ARM920T MCU 200MHZ 352-PBGA

EP9315-CB

Manufacturer Part Number
EP9315-CB
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CB

Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1261

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DS785UM1
The following procedure will correctly set the SelfCtl register value:
1. Read the value of SelfCtl
2. Clear PSPRS bit in SelfCtl Register.
3. Read/write PHY registers.
4. Restore the old value to SelfCtl.
RWP:
GPO0:
PUWE:
PDWE:
MIIL:
Copyright 2007 Cirrus Logic
Remote Wake Pin. This bit reflects the current state of the
REMWAKE pin. Following a system power up, caused by
a Remote Wake-up frame being detected by the MAC, this
bit is set.
General Purpose Output 0. This bit directly controls the
GPO[0] pin. A “1” corresponds to a logic high on the pin.
Power Up Wake-up Enable. Setting the Power Up Wake-
up enable bit causes the MAC to enter the remote wake-
up mode, during normal operation (AHB bus powered up).
In this mode all receive frames that pass the destination
address filter are scanned for the remote wake-up pattern
(six bytes of 0xFF followed directly by sixteen consecutive
copies of the Individual address). When this pattern is
detected, the REMWAKE pin is driven high and Remote
Wake-up (Interrupt Status is set).
Power Down Wake-up Enable. Setting the Power Down
Wake-up Enable bit causes the MAC to enter the remote
wake-up mode when the AHB bus is powered down. In
this mode all receive frames that pass the destination
address filter are scanned for the remote wake-up pattern
(six bytes of FFh followed directly by sixteen consecutive
copies of the Individual address). When this pattern is
detected, the REMWAKE pin is driven high, and can be
used to initiate a system power up, the state of the
REMWAKE pin is visible via the Remote Wake Pin bit of
this register.
MII Loopback. Setting the MII Loopback bit causes
transmit data to be diverted back into the receive data path
prior to the MII interface pins, the transmit data does not
appear on the MII bus and the receive data on the MII bus
is ignored. The clock for the transmit and receive data is
derived from the AHB CLK in the loopback mode. It is
strongly recommended that TXCLK and RXCLK come
from a single clock source with minimum skew in order to
ensure the proper operation of the loopback test. For
reliable operation a software reset should be issued when
the MII loopback bit is changed.
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9-47
9

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