MCL908QY2CDTE Freescale Semiconductor, MCL908QY2CDTE Datasheet - Page 32

IC MCU 8BIT 1.5K FLASH 16-TSSOP

MCL908QY2CDTE

Manufacturer Part Number
MCL908QY2CDTE
Description
IC MCU 8BIT 1.5K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCL908QY2CDTE

Core Processor
HC08
Core Size
8-Bit
Speed
2MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Memory
2.6 FLASH Memory (FLASH)
This subsection describes the operation of the embedded FLASH memory. The FLASH memory can be
read, programmed, and erased from a single external supply. The program and erase operations are
enabled through the use of an internal charge pump.
The FLASH memory consists of an array of 4096 or 1536 bytes with an additional 48 bytes for user
vectors. The minimum size of FLASH memory that can be erased is 64 bytes; and the maximum size of
FLASH memory that can be programmed in a program cycle is 32 bytes (a row). Program and erase
operations are facilitated through control bits in the FLASH control register (FLCR). Details for these
operations appear later in this section. The address ranges for the user memory and vectors are:
2.6.1 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase operations.
HVEN — High Voltage Enable Bit
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
32
unauthorized users.
This read/write bit enables high voltage from the charge pump to the memory for either program or
erase operation. It can only be set if either PGM =1 or ERASE =1 and the proper sequence for
program or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
$EE00 – $FDFF; user memory, 4096 bytes: MC68HLC908QY4 and MC68HLC908QT4
$F800 – $FDFF; user memory, 1536 bytes: MC68HLC908QY2, MC68HLC908QT2,
MC68HLC908QY1 and MC68HLC908QT1
$FFD0 – $FFFF; user interrupt vectors, 48 bytes.
Address:
An erased bit reads as a 1 and a programmed bit reads as a 0. A security
feature prevents viewing of the FLASH contents.
Reset:
Read:
Write:
$FE08
Bit 7
0
0
Figure 2-3. FLASH Control Register (FLCR)
= Unimplemented
MC68HLC908QY/QT Family Data Sheet, Rev. 3
6
0
0
5
0
0
NOTE
4
0
0
HVEN
3
0
(1)
MASS
2
0
ERASE
1
0
Freescale Semiconductor
PGM
Bit 0
0

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