MC56F8002VWL Freescale Semiconductor, MC56F8002VWL Datasheet - Page 26

DSC 12K FLASH 32MHZ 28-SOIC

MC56F8002VWL

Manufacturer Part Number
MC56F8002VWL
Description
DSC 12K FLASH 32MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8002VWL

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
12KB (6K x 16)
Program Memory Type
FLASH
Ram Size
1K x 16
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 15x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Instruction Set Architecture
Dual Harvard
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
40
Data Ram Size
2 KB
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MC56F8006DEMO, APMOTOR56F8000E
Interface Type
LIN, I2C, SCI, SPI
Minimum Operating Temperature
- 40 C
For Use With
APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Signal/Connection Descriptions
(ANA10 and
26
CMP0_M1)
CMP2_M1)
(ANB9 and
CMP0_P1)
(ANB7 and
(ANA6 and
CMP2_P2)
(GPIOD3)
(ANB11)
(CMP1_
GPIOE0
GPIOE1
GPIOE2
GPIOE3
GPIOE4
Signal
Name
OUT)
TMS
(T1)
SOIC
28
24
LQFP
Table 5. 56F8006/56F8002 Signal and Package Information (continued)
32
31
LQFP
48
47
14
18
5
6
8
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 3
Output
Analog
Output
Output
Output
Output
Analog
Output
Analog
Output
Analog
Output
Analog
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
Input
Input
Input
Input
Input
enabled
enabled
enabled
enabled
enabled
enabled
internal
internal
internal
internal
internal
internal
During
Reset
pullup
pullup
pullup
pullup
pullup
pullup
Input,
Input,
Input,
Input,
Input,
Input,
State
Test Mode Select Input — This input pin is used to sequence the
JTAG TAP controller’s state machine. It is sampled on the rising
edge of TCK and has an on-chip pullup resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANB11 — Analog input to channel 11 of ADCB.
T1 — Dual timer module channel 1 input/output.
CMP1_OUT — Analog comparator 2 output.
After reset, the default state is TMS.
Always tie the TMS pin to VDD through a 2.2 k resistor.
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is GPIOE0.
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANB9 and CMP0_P1 — Analog input to channel 9 of ADCB and
positive input 1 of analog comparator 0.
After reset, the default state is GPIOE1.
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANB7 and CMP0_M1 — Analog input to channel 7 of ADCB and
negative input 1 of analog comparator 0.
After reset, the default state is GPIOE2.
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANA10 and CMP2_M1 — Analog input to channel 10 of ADCA and
negative input 1 of analog comparator 2.
After reset, the default state is GPIOE3.
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANA6 and CMP2_P2 — Analog input to channel 6 of ADCA and
positive input 2 of analog comparator 2.
After reset, the default state is GPIOE4.
Signal Description
Freescale Semiconductor

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