MC56F8002VWL Freescale Semiconductor, MC56F8002VWL Datasheet - Page 99

• Manufacturer Part Number: MC56F8002VWL
• Description: DSC 12K FLASH 32MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8002VWL

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 12KB (6K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 16
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 15x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Instruction Set Architecture: Dual Harvard
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 40
• Data Ram Size: 2 KB
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8006DEMO, APMOTOR56F8000E
• Interface Type: LIN, I2C, SCI, SPI
• Minimum Operating Temperature: - 40 C
• For Use With: APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
3
4
5
6
Offset
06–0F
1E–3F
Addr.
(Hex)
The binary reset value of this register is 0000 0000 0UUU UUUU, where U represents an undefined value. Spaces have been added to the value for clarity.
The binary reset value of this register is 0000 0000 111NC NC NC NC NC. Spaces have been added to the value for clarity.
The binary reset value of this register is FS00 0000 0000 0000, where F indicates that the reset state is loaded from the flash array during reset, and where S
indicates that the reset state is determined by the security state of the module. Spaces have been added to the value for clarity.
The reset state is loaded from the flash array during reset.
The reset state is loaded from the flash array during reset.
The reset state is loaded from the flash array during reset.
1A
1B
1D
03
04
10
11
13
14
17
18
19
FFFF
FFFF
FFFF
FFFF
Reset
Value
(Hex)
-000
00C0
0000
0000
0000
—
—
—
—
—
3
6
4
5
6
Periph.
HFM
HFM
HFM
HFM
HFM
HFM
HFM
HFM
HFM
HFM
HFM
HFM
HFM
HFM
FM_SECHI
FM_USTAT
FM_PROT
FM_OPT0
FM_OPT1
FM_DATA
Reserved
Reserved
FM_CMD
Reserved
Reserved
Reserved
Register
TSTSIG
SECLO
FM_
FM_
Bit
15
0
0
0
Table 42. Detailed Peripheral Memory Map (continued)
14
0
0
0
13
0
0
0
0
12
0
0
0
0
11
0
0
0
0
10
0
0
0
0
9
0
0
0
0
TST_AREA_SIG
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PROTECT
IFR_OPT0
IFR_OPT1
8
0
0
0
0
FMDATA
7
0
0
0
CCIF
6
0
0
5
0
0
4
0
0
CMD
3
0
0
0
2
0
0
1
0
0
SEC
Bit
0
0
0