MC68LK332ACAG16 Freescale Semiconductor, MC68LK332ACAG16 Datasheet - Page 49

IC MCU 32BIT LV AMASK 144-LQFP

MC68LK332ACAG16

Manufacturer Part Number
MC68LK332ACAG16
Description
IC MCU 32BIT LV AMASK 144-LQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68LK332ACAG16

Core Processor
CPU32
Core Size
32-Bit
Speed
16.78MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Interface Type
QSPI, SCI, UART
Minimum Operating Temperature
- 40 C
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
16
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Data Ram Size
2 KB
Number Of Programmable I/os
15
Number Of Timers
16
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Program Memory Size
Not Required
Total Internal Ram Size
2KB
# I/os (max)
15
Number Of Timers - General Purpose
16
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68LK332ACAG16
Manufacturer:
MOTOLOLA
Quantity:
1 045
Part Number:
MC68LK332ACAG16
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MC68332
MC68332TS/D
MULS/MULU
ORI to CCR
Instruction
ORI to SR
MOVES
RESET
STOP
NBCD
NEGX
ROXR
SUBQ
ROXL
SBCD
SUBA
SUBX
RTE
SUBI
NEG
NOP
NOT
ROR
PEA
ROL
RTD
RTR
RTS
SUB
ORI
Scc
OR
1
1
1
1
1
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, CCR
<ea>, Dh : Dl
#<data>, SR
#<data>, Dn
#<data>, Dn
#<data>, Dn
#<data>, Dn
(An),
(An),
Rn, <ea>
<ea>, Rn
<ea>, Dn
<ea>, Dn
Dn, <ea>
<ea>, Dn
Dn, <ea>
<ea>, An
<ea>, Dl
#<data>
Syntax
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Í
Í
Í
none
Í
Í
none
Í
Í
Í
Í
none
none
none
Í
Freescale Semiconductor, Inc.
Table 20 Instruction Set Summary(Continued)
#d
For More Information On This Product,
(An)
(An)
8, 16, 32
8, 16, 32
8, 16, 32
Go to: www.freescale.com
Operand Size
16
32
32
32
8
8
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
none
none
none
none
none
16
32
32
16
16
16
16
16
16
16
16
8
8
8
32
32
64
Rn
Source using SFC
Source
(signed or unsigned)
0
0
0
PC
Destination
Source
Data
Source
Source ; SR
SP
Assert RESET line
(SP)
(SP)
SP
Restore stack according to format
(SP)
SP
(SP)
Destination10
If condition true, then destination bits are set to 1;
else, destination bits are cleared to 0
Data
Destination
Destination
Destination
Destination
Destination
Destination
Destination
Destination
4
4
4
2
C
Destination using DFC
Destination
SR; SP
PC; SP
CCR; SP
PC; SP
SR; STOP
Destination
Destination
CCR
X
SP; <ea>
SP;
SP
PC
C
Source
Source
Data
Data
Source
Destination
10
SR
Source10
X
4
2
4
SR
Destination
X
2
Operation
Rn
d
Destination
Destination
Destination
Destination
SP; (SP)
SP
SP
X
Destination
Destination
SP; (SP)
Destination
Destination
Destination
SP
X
Destination
Destination
PC;
PC;
MOTOROLA
C
X
C
49