M30855FJGP#U3 Renesas Electronics America, M30855FJGP#U3 Datasheet - Page 319
M30855FJGP#U3
Manufacturer Part Number
M30855FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30855FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
e
E
3
. v
J
2
0
Figure 22.17 Phase-delayed Waveform Output Mode
C
1
9
0 .
8 /
B
0
3
5
0
3
G
J
7
u
o r
(1) Free-Running Operation
0 -
(2) The Base Timer is Reset when the Base Timer Matches the G1PO0 Register
. l
u
0
1
p
, 1
0
(The RST2 to RST1 bits in the G1BCR1 register are set to "00
(The RST1 bit is set to "1" and the RST2 bit is set to "0")
3
(
The above diagram applies to the following conditions:
2
M
Base Timer
OUTC1j pin
OUTC1j pin
PO1jR bit in the
IIOiIR register
NOTES:
The above diagram applies under the following condition:
Base Timer
PO1jR bit in the
IIOiIR register
OUTC1j pin
0
• The IVL bit in the G1POCRj register is set to "0" ("L" output as default value).
• The UD1 and UD0 bits in the G1BCR1 register are set to "00
• m<n+2
3
0
The INV bit is set to "0" (not inversed).
1. Waveform output when the INV bit in the G1POCRj register is set to "0" (not inversed)
2. Waveform output when the INV bit is set to "0" (not inversed) and the IVL bit is set to "1"
5
2
C
• The RST2 and RST1 bits in the G1BCR1 register are set to "00
and the IVL bit is set to "0" ("L" output as default value).
("H" output as default value).
and the UD1 and UD0 bits to "00
8 /
Page 294
, 5
(1)
(2)
i=0 to 4, 8 to 10; j=0 to 7
m : Setting value of the G1POj register, 0000
i=0 to 4, 8 to 10; j=1 to 7
m : Setting value of the G1POj register, 0000
n: Setting value of the G1PO0 register, 0001
M
3
FFFF
0000
0000
2
C
n+2
f o
"H"
"L"
"H"
"L"
"1"
"0 "
"H"
"L"
"1"
"0"
16
8 /
16
16
m
m
4
5
9
) T
4
f
m
BT1
Inverse
Inverse
Inverse
2
" (counter increment mode).
Write "0" by
program if
setting to "0"
Write "0" by program
if setting to "0"
n+2
f
BT1
65536
f
BT1
16
16
16
to FFFD
to FFFF
to FFFF
Inverse
2
" (counter increment mode).
65536 x 2
n+2
f
BT1
16
16
16
Inverse
f
Inverse
BT1
2
" (no base timer reset)
2
65536
")
f
BT1
Inverse
22. Intelligent I/O
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