M30855FJGP#U3 Renesas Electronics America, M30855FJGP#U3 Datasheet - Page 376

• Manufacturer Part Number: M30855FJGP#U3
• Description: IC M32C MCU FLASH 512K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30855FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
3
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J
2
0
C
1
9
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0 .
B
0
3
5
The CiGMRk, CiLMARk and CiLMBRk registers are used for acceptance filtering. The users can
select and receive user-desired messages.
The CiGMRk register determines whether IDs in the message slots 0 to 13 are verified. The CiLMARk
register determines whether ID in the message slot 14 is verified. The CiLMBRk register determines
whether ID in the message slot 15 is verified.
Figure 23.27 shows each mask register and corresponding message slot. Figure 23.28 shows the
acceptance filtering.
0
G
3
J
NOTES:
7
u
• When bits in these registers are set to "0", each standard ID0 and standard ID1 bits (ID bit) and
• When bits in these registers are set to "1", corresponding ID bits are compared with received IDs
o r
0 -
. l
extended ID0 to extended ID2 bits in the CANi message slots j (j=0 to 15) corresponding to the bits
in the above registers, is masked while acceptance filtering. (The corresponding bits are assumed
to have matching IDs.)
while acceptance filtering. If the received ID matches the ID in the message slot j, the received
data having the matched ID is stored into that message slot.
u
1. Change the CiGMRk register setting only when the message slots 0 to 13 have no receive request.
2. Change the CiLMARk register setting only when the message slot 14 has no receive request.
3. Change the CiLMBRk register setting only when the message slot 15 has no receive request.
4. More than two message slots are able to store a receive message ID, the ID is stored into the
0
1
p
, 1
0
message slot, having the smallest slot number.
3
(
2
M
0
3
0
2
5
C
8 /
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23. CAN Module