M30833FJGP#U5 Renesas Electronics America, M30833FJGP#U5 Datasheet - Page 160

IC M32C/83 MCU FLASH 100LQFP

M30833FJGP#U5

Manufacturer Part Number
M30833FJGP#U5
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30833FJGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
M
14.1 Timer A
e
E
3
. v
J
Figure 14.3 Timer A Block Diagram
2
0
Figure 14.3 shows a block diagram of the timer A. Figures 14.4 to 14.7 show registers associated with the
timer A.
The timer A supports the following four modes. Except in event counter mode, all timers A0 to A4 have the
same function. The TMOD1 to TMOD0 bits in the TAiMR register (i=0 to 4) determine which mode is used.
Table 14.1 lists TAi
when used as an input.
1
9
C
3 .
B
• Timer mode: The timer counts an internal count source.
• Event counter mode: The timer counts an external pulse or an overflow and underflow of other timers.
• One-shot timer mode: The timer outputs one valid pulse until the counter reaches "0000
• Pulse width modulation mode: The timer continuously outputs desired pulse widths.
8 /
0
1
3
0
3
J
G
4
a
TAi
f
0 -
f
f
f
n
o r
1
8
C32
2n
TAi
3 .
IN
Select Count Source
1
u
(1)
, 1
3
OUT
TB2 Overflow
TAj Overflow
TAk Overflow
p
i=0 to 4
j=i-1, except j=4 if i=0
k=i+1, except k=0 if i=4
NOTES:
TCK1 to TCK0, TMOD1 to TMOD0, MR2 to MR1 : Bits in TAiMR register
TAiTGH to TAiTGL: Bits in ONSF register if i=0 or bits in TRGSR register if i=1 to 4
TAiS: Bits in the TABSR register
TAiUD: Bits in the UDF register
1
00
01
10
11
Selector
Polarity
2
(
1. The CNT3 to CNT0 bits in the TCSPR register select
2. Overflow or underflow
M
0
TCK1 to TCK0
no division (n=0) or divide-by-2n (n=1 to 15).
0
3
6
2
C
Pulse Output
OUT
Page 135
8 /
(2)
(2)
(2)
, 3
pin settings when used as an output. Table 14.2 lists TAi
01
10
00
11
M
• Timer
• One-Shot Timer
• Pulse Width Modulation:TMOD1 to TMOD0=11
TAiTGH to TAiTGL
3
2
• Timer(gate function):TMOD1 to TMOD0=00,
C
MR2=1
f o
8 /
4
• Event counter:TMOD1 to TMOD0=01
3
8
) T
8
:TMOD1 to TMOD0=00, MR2=0
:TMOD1 to TMOD0=10
Select clock
Toggle Flip Flop
TAiUD
Timer A0 0347
Timer A1 0349
Timer A2 034B
Timer A3 034D
Timer A4 034F
TAiS
TAi
TMOD1 to TMOD0,
MR2
Addresses
0
1
Decrement
16
16
16
16
16
MR2
0346
0348
034A
034C
034E
16
16
16
16
16
01
11
01
00
Timer A4 Timer A1
Timer A0 Timer A2
Timer A1 Timer A3
Timer A2 Timer A4
Timer A3 Timer A0
TMOD1 to TMOD0
TAj
High-Order Bits of Data Bus
Low-Order Bits of Data Bus
TAk
Reload Register
8 low-
order
bits
IN
Always decrement except
in event counter mode
and TAi
Counter
Increment / decrement
14. Timer (Timer A)
OUT
16
".
pin settings
8 high-
order
bits

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