ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 10

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6603P-PLQW

Manufacturer Part Number
ATA6603P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6603P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
ATA6603P-PLQW
Manufacturer:
ATMEL
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ATA6603P-PLQW
Manufacturer:
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3.3.14.3
10
ATA6602/ATA6603
Sleep Mode
Figure 3-4.
The falling edge at EN has to occure not more than t
ing edge at TXD in order to switch the IC into Sleep mode. The TXD Signal has to stay logic
low during the Mode Select window (see
page
In Sleep mode the transmission path is disabled. Supply current from V
I
termination between pin LIN and pin VS is disabled to minimize the power dissipation in case pin
LIN is shorted to GND. Only a weak pull-up current (typically 10 µA) between pin LIN and pin VS
is present.
A falling edge at pin LIN followed by a dominant bus level maintained for a certain time period
(t
mode. The VDD regulator is activated and the internal LIN slave termination resistor is switched
on. The remote wake-up request is indicated by a low level at pin RXD to interrupt the microcon-
troller (see
VSsleep
bus
LIN Bus
) results in a remote wake-up request. The device switches from Sleep mode to Pre-normal
NRES
8).
RXD
VCC
TXD
EN
= 10 µA. The V
Figure 3-6 on page
If undervoltage, switch to Pre-normal Mode
Node in Silent mode
LIN Wake-up Waveform Diagram from Silent Mode
Bus wake-up filtering time
DD
Silent mode
regulator is switched off. NRES and RXD are low. The internal slave
High
VLIN < 0.4 V
t
12).
bus
S
Regulator Wake-up time
Figure 3-5 on page 11
High
DOMmin
Pre-normal Mode
Pre-normal mode
Undervoltage detection active
= 6 ms after or 3.2 µs before the fall-
Low
and section
“Silent Mode” on
Normal mode
Bat
4921E–AUTO–09/09
Normal Mode
EN High
is typically

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