ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 219
ATA6603P-PLQW
Manufacturer Part Number
ATA6603P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6603P-PLQW.pdf
(360 pages)
Specifications of ATA6603P-PLQW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA6603P-PLQW
Manufacturer:
ATMEL
Quantity:
2 000
Part Number:
ATA6603P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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4.18.3
4921E–AUTO–09/09
SPI Data Modes and Timing
Table 4-83.
Note:
There are four combinations of XCKn (SCK) phase and polarity with respect to serial data, which
are determined by control bits UCPHAn and UCPOLn. The data transfer timing diagrams are
shown in
the XCKn signal, ensuring sufficient time for data signals to stabilize. The UCPOLn and
UCPHAn functionality is summarized in
these bits will corrupt all ongoing communication for both the Receiver and Transmitter.
Table 4-84.
Figure 4-76. UCPHAn and UCPOLn Data Transfer Timing Diagrams
Operating Mode
Synchronous Master
mode
UCPOLn
BAUD
f
UBRRn
OSC
0
0
1
1
1. The baud rate is defined to be the transfer rate in bit per second (bps)
Data setup (TXD)
Data sample (RXD)
XCK
XCK
Data setup (TXD)
Data sample (RXD)
Figure 4-76 on page
Equations for Calculating Baud Rate Register Setting
UCPOLn and UCPHAn Functionality-
UCPHAn
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRnH and UBRRnL Registers, (0-4095)
0
1
0
1
UCPOL=0
Equation for Calculating Baud
BAUD
219. Data bits are shifted out and latched in on opposite edges of
SPI Mode
=
0
1
2
3
Rate
-------------------------------------- -
2 UBRRn
Table
(1)
f
OSC
Leading Edge
Sample (Rising)
Setup (Rising)
Sample (Falling)
Setup (Falling)
4-84. Note that changing the setting of any of
+
1
XCK
Data setup (TXD)
Data sample (RXD)
XCK
Data setup (TXD)
Data sample (RXD)
ATA6602/ATA6603
Equation for Calculating UBRRn
UBRRn
Sample (Falling)
Trailing Edge
Setup (Falling)
Setup (Rising)
Sample (Rising)
UCPOL=1
Value
=
------------------- - 1
2BAUD
f
OSC
–
219
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