ATTINY24-15MZ Atmel, ATTINY24-15MZ Datasheet - Page 75
![MCU AVR 2K FLASH 15MHZ 20-QFN](/photos/12/32/123214/20-qfn-pc_sml.jpg)
ATTINY24-15MZ
Manufacturer Part Number
ATTINY24-15MZ
Description
MCU AVR 2K FLASH 15MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY24-15MZ.pdf
(225 pages)
Specifications of ATTINY24-15MZ
Package / Case
20-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
12
Eeprom Size
128 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
2KB (2K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
SPI/UART
Total Internal Ram Size
128Byte
# I/os (max)
12
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
20
Package Type
QFN EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.5.3
13.6
7701D–AVR–09/10
Compare Match Output Unit
Using the Output Compare Unit
Since writing TCNT0 in any mode of operation will block all compare matches for one timer
clock cycle, there are risks involved in changing TCNT0 when using the output compare unit,
independently of whether the timer/counter is running or not. If the value written to TCNT0
equals the OCR0x value, the compare match will be missed, resulting in incorrect waveform
generation. Similarly, do not write the TCNT0 value equal to bottom when the counter is
down-counting.
The setup of the OC0x should be performed before setting the data direction register for the
port pin to output. The easiest way of setting the OC0x value is to use the force output com-
pare (0x) strobe bits in normal mode. The OC0x registers keep their values even when
changing between waveform generation modes.
Be aware that the COM0x1:0 bits are not double buffered together with the compare value.
Changes to the COM0x1:0 bits will take effect immediately.
The Compare Output mode (COM0x1:0) bits have two functions. The Waveform Generator
uses the COM0x1:0 bits for defining the Output Compare (OC0x) state at the next Compare
Match. Also, the COM0x1:0 bits control the OC0x pin output source.
shows a simplified schematic of the logic affected by the COM0x1:0 bit setting. The I/O regis-
ters, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O port
control registers (DDR and PORT) that are affected by the COM0x1:0 bits are shown. When
referring to the OC0x state, the reference is for the internal OC0x register, not the OC0x pin. If
a system reset occurs, the OC0x register is reset to "0".
Figure 13-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the output compare (OC0x) from the waveform
generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or out-
put) is still controlled by the data direction register (DDR) for the port pin. The data direction
register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is vis-
ible on the pin. The port override function is independent of the waveform generation mode.
COMnx1
COMnx0
FOCn
clk
I/O
Atmel ATtiny24/44/84 [Preliminary]
Waveform
Generator
D
D
D
PORT
OCnx
DDR
Q
Q
Q
1
0
Figure 13-4 on page 75
OCn
Pin
75
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