AT90CAN64-16AUR Atmel, AT90CAN64-16AUR Datasheet - Page 261

• Manufacturer Part Number: AT90CAN64-16AUR
• Description: MCU AVR 64K FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN64-16AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.11 MOb Registers
19.11.1
7679H–CAN–08/08
CAN MOb Status Register - CANSTMOB
• Bit 7:4 – MOBNB3:0: MOb Number
Selection of the MOb number, the available numbers are from 0 to 14.
• Bit 3 – AINC: Auto Increment of the FIFO CAN Data Buffer Index (Active Low)
• Bit 2:0 – INDX2:0: FIFO CAN Data Buffer Index
Byte location of the CAN data byte into the FIFO for the defined MOb.
The MOb registers has no initial (default) value after RESET.
• Bit 7 – DLCW: Data Length Code Warning
The incoming message does not have the DLC expected. Whatever the frame type, the DLC
field of the CANCDMOB register is updated by the received DLC.
• Bit 6 – TXOK: Transmit OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by transmission is completed.
TxOK rises at the end of EOF field and then, the MOb is disabled (the corresponding ENMOB-bit
of CANEN registers is cleared). When the controller is ready to send a frame, if two or more
message objects are enabled as producers, the lower MOb index is supplied first.
• Bit 5 – RXOK: Receive OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by reception is completed.
RxOK rises at the end of the 6
ing ENMOB-bit of CANEN registers is cleared). In case of two or more message object reception
hits, the lower MOb index is updated first.
• Bit 4 – BERR: Bit Error (Only in Transmission)
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The bit value monitored is different from the bit value sent.
Exceptions: the monitored recessive bit sent as a dominant bit during the arbitration field and the
acknowledge slot detecting a dominant bit during the sending of an error frame.
Initial Value
Read/Write
Bit
– 0 - auto increment of the index (default value).
– 1- no auto increment of the index.
DLCW
R/W
7
-
TXOK
R/W
6
-
RXOK
th
R/W
5
-
bit of EOF field and then, the MOb is disabled (the correspond-
BERR
R/W
4
-
SERR
R/W
3
-
CERR
R/W
2
-
AT90CAN32/64/128
FERR
R/W
1
-
AERR
R/W
0
-
CANSTMOB
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