AT32UC3B0512-A2UT Atmel, AT32UC3B0512-A2UT Datasheet - Page 411

• Manufacturer Part Number: AT32UC3B0512-A2UT
• Description: IC MCU AVR32 512K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-A2UT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Controller Family/series: AT32UC3B
• No. Of I/o's: 44
• Ram Memory Size: 96KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• FRZCLK: Freeze USB Clock
• VBUSPO: VBus Polarity
• OTGPADE: OTG Pad Enable
• VBUSHWC: VBus Hardware Control
• STOE: Suspend Time-Out Interrupt Enable
• ROLEEXE: Role Exchange Interrupt Enable
• BCERRE: B-Connection Error Interrupt Enable
• VBERRE: VBus Error Interrupt Enable
• VBUSTE: VBus Transition Interrupt Enable
• IDTE: ID Transition Interrupt Enable
32059K–03/2011
This bit can be written even if FRZCLK is one.
1: The clock input are disabled (the resume detection is still active).This reduces power consumption. Unless explicitly stated, all
registers then become read-only.
0: The clock inputs are enabled.
This bit can be written even if USBE is zero. Disabling the USBB (by writing a zero to the USBE bit) does not reset this bit, but
this freezes the clock inputs whatever its value.
1: The USB_VBOF output signal is inverted (active low).
0: The USB_VBOF output signal is in its default mode (active high).
To be generic. May be useful to control an external VBus power module.
This bit can be written even if USBE is zero or FRZCLK is one. Disabling the USBB (by writing a zero to the USBE bit) does not
reset this bit.
1: The OTG pad is enabled.
0: The OTG pad is disabled.
This bit can be written even if USBE is zero or FRZCLK is one. Disabling the USBB (by writing a zero to the USBE bit) does not
reset this bit.
1: The hardware control over the USB_VBOF output pin is disabled.
0: The hardware control over the USB_VBOF output pin is enabled. The USBB resets the USB_VBOF output pin when a VBUS
problem occurs.
1: The Suspend Time-Out Interrupt (STOI) is enabled.
0: The Suspend Time-Out Interrupt (STOI) is disabled.
1: The Role Exchange Interrupt (ROLEEXI) is enabled.
0: The Role Exchange Interrupt (ROLEEXI) is disabled.
1: The B-Connection Error Interrupt (BCERRI) is enabled.
0: The B-Connection Error Interrupt (BCERRI) is disabled.
1: The VBus Error Interrupt (VBERRI) is enabled.
0: The VBus Error Interrupt (VBERRI) is disabled.
1: The VBus Transition Interrupt (VBUSTI) is enabled.
0: The VBus Transition Interrupt (VBUSTI) is disabled.
1: The ID Transition interrupt (IDTI) is enabled.
0: The ID Transition interrupt (IDTI) is disabled.
AT32UC3B
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