AT32UC3B0512-A2UT Atmel, AT32UC3B0512-A2UT Datasheet - Page 532

• Manufacturer Part Number: AT32UC3B0512-A2UT
• Description: IC MCU AVR32 512K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-A2UT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Controller Family/series: AT32UC3B
• No. Of I/o's: 44
• Ram Memory Size: 96KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

32059K–03/2011
Figure 24-6. Synchronized Period or Duty Cycle Update
To prevent overwriting the CUPDx by software, the user can use status events in order to syn-
chronize his software. Two methods are possible. In both, the user must enable the dedicated
interrupt in IER at PWM Controller level.
The first method (polling method) consists of reading the relevant status bit in ISR Register
according to the enabled channel(s). See
The second method uses an Interrupt Service Routine associated with the PWM channel.
Note:
Figure 24-7. Polling Method
Note:
Reading the ISR register automatically clears CHIDx flags.
Polarity and alignment can be modified only when the channel is disabled.
End of Cycle
Acknoledgement and clear previous register state
The last write has been taken into account
CPRDx
Update of the Period or Duty Cycle
Writing in CPD field
Writing in CUPDx
1
User’s Writing
CUPDx Value
CHIDx = 1
ISR Read
Figure
24-7.
0
CDTYx
CMRx.CPD
AT32UC3B
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