AT91SAM7X128B-AU Atmel, AT91SAM7X128B-AU Datasheet - Page 132

IC MCU 128KB FLASH 100LQFP

AT91SAM7X128B-AU

Manufacturer Part Number
AT91SAM7X128B-AU
Description
IC MCU 128KB FLASH 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7X128B-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
JTAG, SPI, UART
Maximum Clock Frequency
55 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AT91SAM7xxxxx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
55MHz
No. Of Timers
1
Rohs Compliant
Yes
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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20.3.4.4
20.3.4.5
132
SAM7X512/256/128 Preliminary
Flash Lock Commands
Flash General-purpose NVM Commands
All lock bits must be deactivated before using the Full Erase command. This can be done by
using the CLB command.
Table 20-22. Full Erase Command
Lock bits can be set using WPL or EWPL commands. They can also be set by using the Set
Lock command (SLB). With this command, several lock bits can be activated at the same time.
Bit 0 of Bit Mask corresponds to the first lock bit and so on.
In the same way, the Clear Lock command (CLB) is used to clear lock bits. All the lock bits can
also be cleared by the EA command.
Table 20-23. Set and Clear Lock Bit Command
Lock bits can be read using Get Lock Bit command (GLB). When a bit set in the Bit Mask is
returned, then the corresponding lock bit is active.
Table 20-24. Get Lock Bit Command
General-purpose NVM bits (GP NVM) can be set with the Set GPNVM command (SGPB). Using
this command, several GP NVM bits can be activated at the same time. Bit 0 of Bit Mask corre-
sponds to the first GPNVM bit and so on.
In the same way, the Clear GPNVM command (CGPB) is used to clear GP NVM bits. All the
general-purpose NVM bits are also cleared by the EA command.
Table 20-25. Set and Clear General-purpose NVM Bit Command
GP NVM bits can be read using Get GPNVM Bit command (GGPB). When a bit set in the Bit
Mask is returned, then the corresponding GPNVM bit is set.
Table 20-26. Get General-purpose NVM Bit Command
Read/Write
Write
Read/Write
Write
Write
Read/Write
Write
Read
Read/Write
Write
Write
Read/Write
Write
Read
DR Data
EA
DR Data
SLB or CLB
DR Data
GLB
Bit Mask
Bit Mask
DR Data
SGPB or CGPB
Bit Mask
DR Data
GGPB
Bit Mask
6120I–ATARM–06-Apr-11

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