AT91SAM7X128B-AU Atmel, AT91SAM7X128B-AU Datasheet - Page 506

IC MCU 128KB FLASH 100LQFP

AT91SAM7X128B-AU

Manufacturer Part Number
AT91SAM7X128B-AU
Description
IC MCU 128KB FLASH 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7X128B-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
JTAG, SPI, UART
Maximum Clock Frequency
55 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AT91SAM7xxxxx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
55MHz
No. Of Timers
1
Rohs Compliant
Yes
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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36.6
36.6.1
36.6.2
36.6.2.1
506
CAN Controller Features
SAM7X512/256/128 Preliminary
CAN Protocol Overview
Mailbox Organization
Message Acceptance Procedure
The Controller Area Network (CAN) is a multi-master serial communication protocol that effi-
ciently supports real-time control with a very high level of security with bit rates up to 1 Mbit/s.
The CAN protocol supports four different frame types:
The Atmel CAN controller provides the CPU with full functionality of the CAN protocol V2.0 Part
A and V2.0 Part B. It minimizes the CPU load in communication overhead. The Data Link Layer
and part of the physical layer are automatically handled by the CAN controller itself.
The CPU reads or writes data or messages via the CAN controller mailboxes. An identifier is
assigned to each mailbox. The CAN controller encapsulates or decodes data messages to build
or to decode bus data frames. Remote frames, error frames and overload frames are automati-
cally handled by the CAN controller under supervision of the software application.
The CAN module has 8 buffers, also called channels or mailboxes. An identifier that corre-
sponds to the CAN identifier is defined for each active mailbox. Message identifiers can match
the standard frame identifier or the extended frame identifier. This identifier is defined for the first
time during the CAN initialization, but can be dynamically reconfigured later so that the mailbox
can handle a new message family. Several mailboxes can be configured with the same ID.
Each mailbox can be configured in receive or in transmit mode independently. The mailbox
object type is defined in the MOT field of the CAN_MMRx register.
If the MIDE field in the CAN_MIDx register is set, the mailbox can handle the extended format
identifier; otherwise, the mailbox handles the standard format identifier. Once a new message is
received, its ID is masked with the CAN_MAMx value and compared with the CAN_MIDx value.
If accepted, the message ID is copied to the CAN_MIDx register.
• Data frames: They carry data from a transmitter node to the receiver nodes. The overall
• Remote frames: A destination node can request data from the source by sending a remote
• Error frames: An error frame is generated by any node that detects a bus error.
• Overload frames: They provide an extra delay between the preceding and the successive
maximum data frame length is 108 bits for a standard frame and 128 bits for an extended
frame.
frame with an identifier that matches the identifier of the required data frame. The appropriate
data source node then sends a data frame as a response to this node request.
data frames or remote frames.
6120I–ATARM–06-Apr-11

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