P89LPC9381FDH,512 NXP Semiconductors, P89LPC9381FDH,512 Datasheet - Page 36
![IC 80C51 MCU FLASH 4K 28-TSSOP](/photos/6/52/65262/568-28-tssop_sot361-1_sml.jpg)
P89LPC9381FDH,512
Manufacturer Part Number
P89LPC9381FDH,512
Description
IC 80C51 MCU FLASH 4K 28-TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet
1.P89LPC9381FA112.pdf
(60 pages)
Specifications of P89LPC9381FDH,512
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
26
Number Of Timers
2
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
622-1014 - BOARD FOR LPC9XX TSSOP622-1011 - BOARD FOR LPC938 TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
935280615512
P89LPC9381FDH
P89LPC9381FDH
P89LPC9381FDH
P89LPC9381FDH
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P89LPC9381FDH,512
Manufacturer:
LT
Quantity:
2 340
Philips Semiconductors
P89LPC9381_1
Product data sheet
Fig 14. Watchdog timer in Watchdog mode (WDTE = 1)
(1) Watchdog reset can also be caused by an invalid feed sequence, or by writing to WDCON not immediately followed by a
feed sequence.
watchdog
oscillator
MOV WFEED1, #0A5H
MOV WFEED2, #05AH
PCLK
7.25.1 Software reset
7.25.2 Dual data pointers
7.24 Watchdog timer
7.25 Additional features
The watchdog timer causes a system reset when it underflows as a result of a failure to
feed the timer prior to the timer reaching its terminal count. It consists of a programmable
12-bit prescaler, and an 8-bit down counter. The down counter is decremented by a tap
taken from the prescaler. The clock source for the prescaler is either the PCLK or the
nominal 400 kHz Watchdog oscillator. The watchdog timer can only be reset by a
power-on reset. When the watchdog feature is disabled, it can be used as an interval timer
and may generate an interrupt.
Feeding the watchdog requires a two-byte sequence. If PCLK is selected as the watchdog
clock and the CPU is powered-down, the watchdog is disabled. The watchdog timer has a
time-out period that ranges from a few s to a few seconds. Please refer to the
P89LPC9381 User’s Manual for more details.
The SRST bit in AUXR1 gives software the opportunity to reset the processor completely,
as if an external reset or watchdog reset had occurred. Care should be taken when writing
to AUXR1 to avoid accidental software resets.
The dual Data Pointers (DPTR) provides two different Data Pointers to specify the address
used with certain instructions. The DPS bit in the AUXR1 register selects one of the two
Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that the DPS bit may
be toggled (thereby switching Data Pointers) simply by incrementing the AUXR1 register,
without the possibility of inadvertently altering other bits in the register.
WDCON (A7H)
32
PRE2
PRESCALER
Rev. 01 — 8 September 2006
PRE1
PRE0
Figure 14
SHADOW REGISTER
-
shows the watchdog timer in Watchdog mode.
-
8-BIT DOWN
WDL (C1H)
COUNTER
8-bit microcontroller with 10-bit ADC
WDRUN
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
WDTOF
P89LPC9381
WDCLK
002aaa905
reset
(1)
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