Z8F012ASB020SG Zilog, Z8F012ASB020SG Datasheet - Page 104

• Manufacturer Part Number: Z8F012ASB020SG
• Description: IC ENCORE XP MCU FLASH 1K 8SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F012ASB020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: Z8F012Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4039; Z8F012ASB020SG

Watchdog Timer Calibration
PS022825-0908
Watchdog Timer Reload Unlock Sequence
WDT Reset in Normal Operation
If configured to generate a Reset when a time-out occurs, the Watchdog Timer forces the
device into the System Reset state. The WDT status bit in the Reset Status (RSTSTAT)
register is set to 1. For more information on system reset, see
and Low Voltage Detection
WDT Reset in STOP Mode
If configured to generate a Reset when a time-out occurs and the device is in STOP mode,
the Watchdog Timer initiates a Stop Mode Recovery. Both the WDT status bit and the
STOP bit in the Reset Status (RSTSTAT) register are set to 1 following WDT time-out in
STOP mode.
Writing the unlock sequence to the Watchdog Timer (WDTCTL) Control register address
unlocks the three Watchdog Timer Reload Byte registers (WDTU, WDTH, and WDTL) to
allow changes to the time-out period. These write operations to the WDTCTL register
address produce no effect on the bits in the WDTCTL register. The locking mechanism
prevents spurious writes to the Reload registers. Follow the steps below to unlock the
Watchdog Timer Reload Byte registers (WDTU, WDTH, and WDTL) for write access.
1. Write 55
2. Write AA
3. Write the Watchdog Timer Reload Upper Byte register (WDTU) with the desired
4. Write the Watchdog Timer Reload High Byte register (WDTH) with the desired
5. Write the Watchdog Timer Reload Low Byte register (WDTL) with the desired
All three Watchdog Timer Reload registers must be written in the order just listed. There
must be no other register writes between each of these operations. If a register write
occurs, the lock state machine resets and no further writes can occur unless the sequence is
restarted. The value in the Watchdog Timer Reload registers is loaded into the counter
when the Watchdog Timer is first enabled and every time a WDT instruction is executed.
Due to its extremely low operating current, the Watchdog Timer oscillator is somewhat
inaccurate. This variation can be corrected using the calibration data stored in the Flash
Information Page (see
time-out value.
time-out value.
time-out value.
H
H
to the Watchdog Timer Control register (WDTCTL).
to the Watchdog Timer Control register (WDTCTL).
Table 97
on page 23.
and
Table 98
on page 165). Loading these values into the
Z8 Encore! XP
Reset, Stop Mode Recovery,
Product Specification
®
F082A Series
Watchdog Timer
93