Z8F012ASB020SG Zilog, Z8F012ASB020SG Datasheet - Page 77

• Manufacturer Part Number: Z8F012ASB020SG
• Description: IC ENCORE XP MCU FLASH 1K 8SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F012ASB020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: Z8F012Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4039; Z8F012ASB020SG

Table 45. Interrupt Edge Select Register (IRQES)
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
Interrupt Edge Select Register
Shared Interrupt Select Register
IES7
R/W
7
0
Reserved—Must be 0.
C3ENL—Port C3 Interrupt Request Enable Low Bit
C2ENL—Port C2 Interrupt Request Enable Low Bit
C1ENL—Port C1 Interrupt Request Enable Low Bit
C0ENL—Port C0 Interrupt Request Enable Low Bit
The Interrupt Edge Select (IRQES) register
generated for the rising edge or falling edge on the selected GPIO Port A input pin.
IESx—Interrupt Edge Select x
0 = An interrupt request is generated on the falling edge of the PAx input.
1 = An interrupt request is generated on the rising edge of the PAx input.
where x indicates the specific GPIO Port pin number (0 through 7).
The Shared Interrupt Select (IRQSS) register
PADxS interrupts. The Shared Interrupt Select register selects between Port A and
alternate sources for the individual interrupts.
Because these shared interrupts are edge-triggered, it is possible to generate an interrupt
just by switching from one shared source to another. For this reason, an interrupt must be
disabled before switching between sources.
IES6
R/W
6
0
IES5
R/W
5
0
IES4
R/W
4
0
FCDH
(Table
(Table
IES3
R/W
3
0
45) determines whether an interrupt is
46) determines the source of the
Z8 Encore! XP
IES2
R/W
2
0
Product Specification
IES1
R/W
1
0
®
Interrupt Controller
F082A Series
IES0
R/W
0
0
66