F272-BAGE-T-TR STMicroelectronics, F272-BAGE-T-TR Datasheet - Page 139

• Manufacturer Part Number: F272-BAGE-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAGE-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 20 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

ST10F272B/ST10F272E
Table 67.
Note:
24.7.2
ADCTC
00
00
00
00
11
11
11
11
10
10
10
10
ADSTC
Fast conversion can be achieved by programming the respective times to their absolute
possible minimum. This is preferable for scanning high frequency signals. The internal
resistance of analog source and analog supply must be sufficiently low, however.
High internal resistance can be achieved by programming the respective times to a higher
value, or the possible maximum. This is preferable when using analog sources and supply
with a high internal resistance in order to keep the current as low as possible. The
conversion rate in this case may be considerably lower, however.
The conversion times are programmed via the upper four bits of register ADCON. Bit fields
ADCTC and ADSTC are used to define the basic conversion time and in particular the
partition between sample phase and comparison phases. The table below lists the possible
combinations. The timings refer to the unit TCL, where f
conversion time includes the conversion itself, the sample time and the time required to
transfer the digital value to the result register.
A/D converter programming
The total conversion time is compatible with the formula valid for ST10F269, while the
meaning of the bit fields ADCTC and ADSTC is no longer compatible: the minimum
conversion time is 388 TCL, which at 40MHz CPU frequency corresponds to 4.85
ST10F269).
A/D conversion accuracy
The A/D Converter compares the analog voltage sampled on the selected analog input
channel to its analog reference voltage (V
absolute accuracy of the A/D conversion is the deviation between the input analog value and
the output digital value. It includes the following errors:
●
●
●
●
00
01
10
11
00
01
10
11
00
01
10
11
Offset error (OFS)
Gain Error (GE)
Quantization error
Non-Linearity error (Differential and Integral)
TCL * 1600
TCL * 120
TCL * 140
TCL * 200
TCL * 400
TCL * 240
TCL * 280
TCL * 400
TCL * 800
TCL * 480
TCL * 560
TCL * 800
Sample
Comparison
TCL * 1120
TCL * 1120
TCL * 1120
TCL * 240
TCL * 280
TCL * 280
TCL * 280
TCL * 480
TCL * 560
TCL * 560
TCL * 560
TCL * 960
AREF
) and converts it into 10-bit digital data. The
TCL * 100
TCL * 100
TCL * 196
TCL * 164
TCL * 28
TCL * 16
TCL * 52
TCL * 44
TCL * 52
TCL * 28
TCL * 52
CPU
TCL * 52
Extra
= 1/2TCL. A complete
Electrical characteristics
Total conversion
TCL * 1060
TCL * 1444
TCL * 1540
TCL * 1732
TCL * 2116
TCL * 2884
TCL * 388
TCL * 436
TCL * 532
TCL * 724
TCL * 772
TCL * 868
µ
s (see
139/182