F272-BAGE-T-TR STMicroelectronics, F272-BAGE-T-TR Datasheet - Page 40

• Manufacturer Part Number: F272-BAGE-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAGE-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 20 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Internal Flash memory
5.5.5
5.5.6
5.5.7
40/182
Flash non volatile access protection register 1 high
FNVAPR1H (0x08 DFBE)
PEN15PEN14PEN13PEN12PEN11PEN10 PEN9 PEN8 PEN7 PEN6 PEN5 PEN4 PEN3 PEN2 PEN1 PEN0
Table 22.
XBus flash volatile temporary access unprotection register (XFVTAUR0)
XFVTAUR0 (0x00 EB50)
Table 23.
Access protection
The I-Flash module has one level of access protection (access to data both in Reading and
Writing): if bit ACCP of FNVAPR0 is programmed at 0 and bit TAUB in XFVTAUR0 is set at
0, the I-Flash module becomes access protected: data in the I-Flash module can be read
only if the current execution is from the I-Flash module itself.
To enable Access Protection, the following sequence of operations is recommended:
●
●
●
●
●
Protection can be permanently disabled by programming bit PDS0 of FNVAPR1H, in order
to analyze rejects. Protection can be permanently enabled again by programming bit PEN0
of FNVAPR1L. The action to disable and enable again Access Protections in a permanent
way can be executed a maximum of 16 times. To execute the above described operations,
the Flash has to be temporary unprotected (See
PEN15-0
TAUB
RW
15
15
execution from external memory or internal Rams
program TAUB bit at 1 in XFVTAUR0 register
program ACCP bit in FNVAPR0 to 0 using Set Protection operation
program TAUB bit at 0 in XFVTAUR0 register
Access Protection is active when both ACCP bit and TAUB bit are set to 0.
Bit
Bit
RW
14
14
RW
13
13
Flash non volatile access protection register 1 high
XBus flash volatile temporary access unprotection register
Protections Enable 15-0
If bit PENx is programmed at 0 and bit PDSx+1 is erased at 1, the action of bit
ACCP is enabled again. Bit PENx can be programmed at 0 only if bit PDSx has
already been programmed at 0.
Temporary Access Unprotection bit
If this bit is set to 1, the Access Protection is temporary disabled.
This bit can be written only executing from IFlash.This fact guarantees that only a
code executed in IFlash, can unprotect the IFlash, when it is Access Protected.
RW
12
12
RW
11
11
RW
10
10
RW
9
9
reserved
NVR
NVR
RW
8
8
RW
7
7
Section 5.5.9: Temporary
Function
Function
RW
6
6
RW
5
5
RW
4
4
ST10F272B/ST10F272E
RW
3
3
Delivery value: FFFFh
Reset value: 0000h
unprotection)
RW
2
2
RW
1
1
TAUB
RW
RW
0
0