F272-BAGE-T-TR STMicroelectronics, F272-BAGE-T-TR Datasheet - Page 19

• Manufacturer Part Number: F272-BAGE-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAGE-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 20 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

ST10F272B/ST10F272E
Table 1.
P0L.0 -P0L.7,
EA / V
Symbol
P0H.1 -
P0H.0
P0H.7
STBY
Pin description (continued)
100-107,
111-117
108,
Pin
99
Type
I/O
I
External access enable pin.
A low level applied to this pin during and after Reset forces the ST10F272 to start
the program from the external memory space. A high level forces ST10F272 to
start in the internal memory space. This pin is also used (when Stand-by mode is
entered, that is ST10F272 under reset and main V
kHz oscillator amplifier circuit and to provide a reference voltage for the low-
power embedded voltage regulator which generates the internal 1.8V supply for
the RTC module (when not disabled) and to retain data inside the Stand-by
portion of the XRAM (16Kbyte).
It can range from 4.5 to 5.5V (6V for a reduced amount of time during the device
life, 4.0V when RTC and 32 kHz on-chip oscillator amplifier are turned off). In
running mode, this pin can be tied low during reset without affecting 32 kHz
oscillator, RTC and XRAM activities, since the presence of a stable V
guarantees the proper biasing of all those modules.
Two 8-bit bidirectional I/O ports P0L and P0H, bit-wise programmable for input or
output via direction bit. Programming an I/O pin as input forces the corresponding
output driver to high impedance state. The input threshold of Port 0 is selectable
(TTL or CMOS).
In case of an external bus configuration, PORT0 serves as the address (A) and
as the address / data (AD) bus in multiplexed bus modes and as the data (D) bus
in demultiplexed bus modes.
Demultiplexed bus modes
Multiplexed bus modes
Data path width
P0L.0 – P0L.7:
P0H.0 – P0H.7:
Data path width
P0L.0 – P0L.7:
P0H.0 – P0H.7:
8-bit
D0 – D7
I/O
8-bit
AD0 – AD7
A
8 – A15
Function
16-bi
D0 - D7
D8 - D15
16-bi
AD0 - AD7
A
D8 - AD15
DD
turned off) to bias the 32
DD
Pin data
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