F272-BAGE-T-TR STMicroelectronics, F272-BAGE-T-TR Datasheet - Page 32

• Manufacturer Part Number: F272-BAGE-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAGE-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 20 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Internal Flash memory
5.4.2
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Flash control register 0 high
The Flash Control Register 0 High (FCR0H) together with the Flash Control Register 0 Low
(FCR0L) is used to enable and to monitor all the write operations on the IFLASH. The user
has no access in write mode to the Test-Flash (B0TF). Besides, Test-Flash block is seen by
the user in Bootstrap Mode only.
FCR0H (0x08 0002)
Table 8.
SPR
SER
DWPG
WPG
WMS SUSP
RW
15
Bit
RW
14
WPG DWPG SER
RW
13
Flash control register 0 high
Set Protection
This bit must be set to select the Set Protection operation. The Set Protection
operation allows to program 0s in place of 1s in the Flash Non Volatile Protection
Registers. The Flash Address in which to program must be written in the FARH/L
registers, while the Flash Data to be programmed must be written in the FDR0H/L
before starting the execution by setting bit WMS. A sequence error is flagged by bit
SEQER of FER if the address written in FARH/L is not in the range 0x0E8FB0-
0x08DFBF. SPR bit is automatically reset at the end of the Set Protection
operation.
Sector Erase
This bit must be set to select the Sector Erase operation in the Flash modules. The
Sector Erase operation allows to erase all the Flash locations to value 0xFF. From
1 to all the sectors of the same Bank (excluded Test-Flash for Bank B0) can be
selected to be erased through bits BxFy of FCR1H/L registers before starting the
execution by setting bit WMS. It is not necessary to pre-program the sectors to
0x00, because this is done automatically. SER bit is automatically reset at the end
of the Sector Erase operation.
Double Word Program
This bit must be set to select the Double Word (64 bits) Program operation in the
Flash module. The Double Word Program operation allows to program 0s in place
of 1s. The Flash Address in which to program (aligned with even words) must be
written in the FARH/L registers, while the 2 Flash Data to be programmed must be
written in the FDR0H/L registers (even word) and FDR1H/L registers (odd word)
before starting the execution by setting bit WMS. DWPG bit is automatically reset
at the end of the Double Word Program operation.
Word Program
This bit must be set to select the Word (32 bits) Program operation in the Flash
module. The Word Program operation allows to program 0s in place of 1s. The
Flash Address to be programmed must be written in the FARH/L registers, while
the Flash Data to be programmed must be written in the FDR0H/L registers before
starting the execution by setting bit WMS. WPG bit is automatically reset at the
end of the Word Program operation.
RW
12
RW
11
10
reserved
9
FCR
SPR
RW
8
7
Function
6
5
reserved
4
ST10F272B/ST10F272E
3
Reset value:
2
1
0000h
0