MC9S08GT16ACFBE Freescale Semiconductor, MC9S08GT16ACFBE Datasheet - Page 17

• Manufacturer Part Number: MC9S08GT16ACFBE
• Description: IC MCU 16K FLASH 2K RAM 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT16ACFBE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 36
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Processor Series: S08GT
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: M68EVB908GB60E, M68DEMO908GB60E
• Minimum Operating Temperature: - 40 C
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Section Number
14.2 External Signal Description ..........................................................................................................224
14.3 Register Definition ........................................................................................................................225
14.4 Functional Description ..................................................................................................................230
14.5 Resets ............................................................................................................................................235
14.6 Interrupts .......................................................................................................................................235
15.1 Introduction ...................................................................................................................................237
15.2 Background Debug Controller (BDC) ..........................................................................................238
15.3 On-Chip Debug System (DBG) ....................................................................................................247
15.4 Register Definition ........................................................................................................................251
Freescale Semiconductor
14.1.3 Block Diagram ................................................................................................................223
14.2.1 ADP7–ADP0 — Channel Input Pins ..............................................................................225
14.2.2 V
14.2.3 V
14.3.1 ATD Control (ATDC) .....................................................................................................225
14.3.2 ATD Status and Control (ATDSC) ..................................................................................228
14.3.3 ATD Result Data (ATDRH, ATDRL) .............................................................................229
14.3.4 ATD Pin Enable (ATDPE) ..............................................................................................229
14.4.1 Mode Control ..................................................................................................................230
14.4.2 Sample and Hold .............................................................................................................230
14.4.3 Analog Input Multiplexer ................................................................................................232
14.4.4 ATD Module Accuracy Definitions ................................................................................232
15.1.1 Features ...........................................................................................................................238
15.2.1 BKGD Pin Description ...................................................................................................239
15.2.2 Communication Details ..................................................................................................240
15.2.3 BDC Commands .............................................................................................................244
15.2.4 BDC Hardware Breakpoint .............................................................................................246
15.3.1 Comparators A and B ......................................................................................................247
15.3.2 Bus Capture Information and FIFO Operation ...............................................................247
15.3.3 Change-of-Flow Information ..........................................................................................248
15.3.4 Tag vs. Force Breakpoints and Triggers .........................................................................248
15.3.5 Trigger Modes .................................................................................................................249
15.3.6 Hardware Breakpoints ....................................................................................................251
15.4.1 BDC Registers and Control Bits .....................................................................................251
15.4.2 System Background Debug Force Reset Register (SBDFR) ..........................................253
15.4.3 DBG Registers and Control Bits .....................................................................................254
14.1.2.2 Power Down Mode .......................................................................................223
15.4.1.1 BDC Status and Control Register (BDCSCR) ..............................................252
15.4.1.2 BDC Breakpoint Match Register (BDCBKPT) ............................................253
15.4.3.1 Debug Comparator A High Register (DBGCAH) ........................................254
REFH
DDAD
, V
, V
REFL
SSAD
— ATD Reference Pins .........................................................................225
— ATD Supply Pins ............................................................................225
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Development Support
Chapter 15
Title
Page
17