MC9S08GT16ACFBE Freescale Semiconductor, MC9S08GT16ACFBE Datasheet - Page 50

• Manufacturer Part Number: MC9S08GT16ACFBE
• Description: IC MCU 16K FLASH 2K RAM 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT16ACFBE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 36
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Processor Series: S08GT
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: M68EVB908GB60E, M68DEMO908GB60E
• Minimum Operating Temperature: - 40 C
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Memory
A partial command sequence can be aborted manually by writing a 0 to FCBEF any time after the write to
the memory array and before writing the 1 that clears FCBEF and launches the complete command.
Aborting a command in this way sets the FACCERR access error flag which must be cleared before
starting a new command.
A strictly monitored procedure must be adhered to, or the command will not be accepted. This minimizes
the possibility of any unintended change to the FLASH memory contents. The command complete flag
(FCCF) indicates when a command is complete. The command sequence must be completed by clearing
FCBEF to launch the command.
burst programming. The FCDIV register must be initialized before using any FLASH commands. This
must be done only once following a reset.
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2. Write the command code for the desired command to FCMD. The five valid commands are blank
3. Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its
check (0x05), byte program (0x20), burst program (0x25), page erase (0x40), and mass erase
(0x41). The command code is latched into the command buffer.
address and data information).
Do not program any byte in the FLASH more than once after a successful
erase operation. Reprogramming bits in a byte which is already
programmed is not allowed without first erasing the page in which the byte
resides or mass erasing the entire FLASH memory. Programming without
first erasing may disturb data stored in the FLASH.
Figure 4-2
MC9S08GT16A/GT8A Data Sheet, Rev. 1
is a flowchart for executing all of the commands except for
NOTE
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