S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 106
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S9S12HY64J0MLL
Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12HA32J0CLL.pdf
(792 pages)
Specifications of S9S12HY64J0MLL
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12HY64J0MLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S12HY64J0MLL
Manufacturer:
FREESCALE
Quantity:
20 000
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1
1
1
Port Integration Module (S12HYPIMV1)
2.3.56
2.3.57
106
Function
Address 0x0278-0x27F
Address 0x0280
PER1AD
Read: Anytime
Write: Anytime
Read: Always reads 0x00
Write: Unimplemented
Read: Anytime The data source is depending on the data direction value.
Write: Anytime
Altern.
Field
Reset
Reset
7-0
W
W
R
R
Port AD pull-up enable—Enable pull-up device on input pin
This bit controls whether a pull up device on the associated port input pin is active. If a pin is used as output this bit
has no effect.
1 Pull device enabled
0 Pull device disabled
PTR7
FP27
PIM Reserved Registers
Port R Data Register (PTR)
—
0
0
0
7
7
= Unimplemented or Reserved
PTR6
FP18
SCL
0
0
0
6
6
Table 2-46. PER1AD Register Field Descriptions
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 2-55. Port R Data Register (PTR)
Figure 2-54. PIM Reserved Registers
PTR5
FP17
SDA
0
0
0
5
5
FP112
PTR4
—
0
0
0
4
4
Description
u = Unaffected by reset
IOC1_7
PTR3
—
3
0
0
3
0
IOC1_6
PTR2
—
0
0
0
2
2
Freescale Semiconductor
IOC0_7
Access: User read/write
PTR1
—
0
0
0
1
1
Access: User read
IOC0_6
PTR0
—
0
0
0
0
0
1
1
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