S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 128

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
Port
Each cell represents one register with individual configuration bits
AD
A
B
S
R
P
H
U
V
T
Port Integration Module (S12HYPIMV1)
2.4.2
A set of configuration registers is common to all ports with exception of the ATD port
registers can be written at any time, however a specific configuration might not become active.
For example selecting a pull-up device: This device does not become active while the port is used as a
push-pull output.
2.4.2.1
This register holds the value driven out to the pin if the pin is used as a general purpose I/O.
Writing to this register has only an effect on the pin if the pin is used as general purpose output. When
reading this address, the buffered state of the pin is returned if the associated data direction register bit is
set to “0”.
If the data direction register bits are set to logic level “1”, the contents of the data register is returned. This
is independent of any other configuration
2.4.2.2
This register is read-only and always returns the buffered state of the pin
2.4.2.3
This register defines whether the pin is used as an general purpose input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored
Independent of the pin usage with a peripheral module this register determines the source of data when
reading the associated data register address (2.4.2.1/2-128).
128
Data
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
Registers
Data register (PORTx, PTx)
Input register (PTIx)
Data direction register (DDRx)
Input
yes
yes
yes
yes
yes
yes
yes
-
-
-
Direction
Data
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-74. Register availability per port
Reduced
Drive
yes
yes
yes
yes
yes
yes
yes
yes
yes
(Figure
Enable
Pull
yes
yes
yes
yes
yes
yes
yes
yes
yes
2-87).
Polarity
Select
yes
yes
yes
yes
yes
yes
yes
-
-
-
Or Mode
Wired-
yes
yes
yes
-
-
-
-
-
-
-
1
(Figure
Slew
Rate
yes
yes
-
-
-
-
-
-
-
-
2-87).
Interrupt
Enable
Freescale Semiconductor
yes
yes
yes
yes
-
-
-
-
-
-
(Table
(Figure
Interrupt
Flag
2-74). All
yes
yes
yes
yes
-
-
-
-
-
-
2-87).
Routing
yes
yes
yes
yes
-
-
-
-
-
-