S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 386

• Manufacturer Part Number: S9S12HY64J0MLL
• Description: MCU 64K FLASH AUTO 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Controller Family/series: S12
• No. Of I/o's: 80
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Inter-Integrated Circuit (IICV3) Block Description
386
Dummy Read
From IBDR
Switch To
Rx Mode
Y
Byte To IBDR
(Master Rx)
Transmitted
Addr Cycle
Write Next
Last Byte
RXAK=0
End Of
?
?
?
Y
N
N
TX
Stop Signal
Generate
Y
N
Figure 10-16. Flow-Chart of Typical IIC Interrupt Routine
Tx/Rx
Set TXAK =1
?
Y
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Byte To Be Read
Byte To Be Read
From IBDR
Read Data
And Store
2nd Last
RX
Last
?
?
N
N
Stop Signal
Generate
Y
Y
RTI
Master
Mode
Clear
IBIF
?
Write Data
(Read)
To IBDR
Set TX
Mode
N
Y
N
7-bit address transfer
Clear IBAL
IAAS=1
Dummy Read
SRW=1
From IBDR
?
Set RX
?
Mode
N
N
(Write)
Y
10-bit
address?
Tx Next
Byte
Y
Y
Y
Dummy Read
From IBDR
Arbitration
ACK From
Switch To
Receiver
IAAS=1
Rx Mode
TX/RX
Lost
?
?
?
?
N
N
N
TX
Data Transfer
From IBDR
Freescale Semiconductor
Read Data
And Store
Dummy Read
From IBDR
RX
N
set RX
Mode
10-bit address transfer
IBDR==
11110xx1?
set TX
Mode
Write Data
To IBDR
Y
Y