S9S12HY64J0MLL Freescale Semiconductor, S9S12HY64J0MLL Datasheet - Page 56

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S9S12HY64J0MLL

Manufacturer Part Number
S9S12HY64J0MLL
Description
MCU 64K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12HY64J0MLL

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Controller Family/series
S12
No. Of I/o's
80
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Port Integration Module (S12HYPIMV1)
56
Port
H
P
R
Pin Name
PH[7:4]
PP[7:0]
PR[3:2]
PR[1:0]
PH[3]
PH[2]
PH[1]
PH[0]
PR[7]
PR[6]
PR[5]
PR[4]
Pin Function
& Priority
FP[26:23]
PWM[7:0]
KWR[3:2]
IOC1[7:6]
KWR[1:0]
IOC0[7:6]
FP[7:0]
FP[22]
FP[21]
FP[20]
FP[19]
FP[27]
FP[18]
FP[17]
FP[12]
ECLK
GPIO
GPIO
GPIO
MOSI
GPIO
MISO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
SCK
SDA
SCL
SCL
SDA
SS
1
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
I/O
I/O General purpose
I/O SDA of IIC, mappable through software
I/O SS of SPI, mappable through software
I/O General purpose
I/O SCK of SPI, mappable through software
I/O General purpose
I/O MOSI of SPI, mappable through software
I/O General purpose
I/O SCL of IIC, mappable through software
I/O MISO of SPI, mappable through software
I/O General purpose
I/O Pulse Width Modulator channel 7 - 0
I/O General purpose
I/O General purpose
I/O SCL of IIC, mappable through software
I/O General purpose
I/O SDA of IIC, mappable through software
I/O General purpose
I/O General purpose
I/O TIM1 channel, mappable through software
I/O General purpose
I/O TIM0 channel, mappable through software
I/O General purpose
O
O
O
O
O
O
O
I
I
I
I
I
I
LCD frontplane segment driver output
LCD frontplane segment driver output
LCD frontplane segment driver output
Free-running clock at bus clock rate or programmable
down-scaled bus clock
LCD frontplane segment driver output
LCD frontplane segment driver output
LCD frontplane segment driver output
LCD frontplane segment driver output
LCD frontplane segment driver output
LCD frontplane segment driver output
LCD frontplane segment driver output
Key Wakeup
Key Wakeup
Description
Freescale Semiconductor
Pin Function
after Reset
GPIO
GPIO
GPIO

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