MCHC908GR8AMFAE Freescale Semiconductor, MCHC908GR8AMFAE Datasheet - Page 113

IC MCU 8K FLASH 8MHZ 32-LQFP

MCHC908GR8AMFAE

Manufacturer Part Number
MCHC908GR8AMFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908GR8AMFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Processor Series
HC08G
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Part Number:
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Part Number:
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Quantity:
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11.3.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having V
V
continually entering and exiting reset if V
V
11.3.4 LVI Trip Selection
The LVI5OR3 bit in the configuration register selects whether the LVI is configured for 5-V or 3-V
protection.
11.4 LVI Status Register
The LVI status register (LVISR) indicates if the V
LVIOUT — LVI Output Bit
11.5 LVI Interrupts
The LVI module does not generate interrupt requests.
11.6 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby modes.
Freescale Semiconductor
DD
TRIPF
This read-only flag becomes set when the V
Table
rises above the rising trip point voltage, V
by the hysteresis voltage, V
11-1). Reset clears the LVIOUT bit.
Address:
The microcontroller is guaranteed to operate at a minimum supply voltage.
The trip point (V
Chapter 19 Electrical Specifications
Reset:
Read:
Write:
LVIOUT
$FE0C
Bit 7
0
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
= Unimplemented
Figure 11-3. LVI Status Register (LVISR)
V
TRIPF
TRIPF
6
0
0
V
Table 11-1. LVIOUT Bit Indication
V
HYS
DD
DD
< V
[5 V] or V
V
> V
< V
.
DD
DD
DD
DD
TRIPR
TRIPF
< V
5
0
0
fall below V
is approximately equal to V
TRIPR
TRIPR
TRIPF
DD
DD
NOTE
voltage falls below the V
for the actual trip point voltages.
4
0
0
. This prevents a condition in which the MCU is
voltage was detected below the V
[3 V]) may be lower than this. See
TRIPF
Previous value
), the LVI will maintain a reset condition until
3
0
0
LVIOUT
0
1
2
0
0
TRIPF
TRIPF
. V
1
0
0
TRIPR
trip voltage (see
is greater than
TRIPF
Bit 0
LVI Status Register
0
0
level.
113

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