MCHC908GR8AMFAE Freescale Semiconductor, MCHC908GR8AMFAE Datasheet - Page 41

IC MCU 8K FLASH 8MHZ 32-LQFP

MCHC908GR8AMFAE

Manufacturer Part Number
MCHC908GR8AMFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908GR8AMFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Processor Series
HC08G
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908GR8AMFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCHC908GR8AMFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.6.5 FLASH Program/Read Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, and $XXE0.
During the programming cycle, make sure that all addresses being written to fit within one of the ranges
specified above. Attempts to program addresses in different row ranges in one programming cycle will
fail. Use this step-by-step procedure to program a row of FLASH memory
representation).
This program sequence is repeated throughout the memory until all data is programmed.
Freescale Semiconductor
10. Clear the PGM bit.
11. Wait for a time, t
12. Clear the HVEN bit.
13. After time, t
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
2. Read the FLASH block protect register.
3. Write any data to any FLASH address within the row address range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Write data to the FLASH address to be programmed.
8. Wait for a time, t
9. Repeat step 7 and 8 until all the bytes within the row are programmed.
address and data for programming.
Programming and erasing of FLASH locations cannot be performed by
code being executed from FLASH memory. While these operations must
be performed in the order shown, other unrelated operations may occur
between the steps.
Programming and erasing of FLASH locations can not be performed by
code being executed from the same FLASH array.
While these operations must be performed in the order shown, other
unrelated operations may occur between the steps. Care must be taken
within the FLASH array memory space such as the COP control register
(COPCTL) at $FFFF.
It is highly recommended that interrupts be disabled during program/ erase
operations.
RCV
(typical 1 μs), the memory can be accessed in read mode again.
NVS
PGS
PROG
NVH
Only bytes which are currently $FF may be programmed.
(1)
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
(minimum 10 μs).
(minimum 5 μs).
(minimum 5 μs).
(minimum 30 μs).
NOTE
NOTE
NOTE
NOTE
NOTE
(Figure 2-4
FLASH Memory (FLASH)
is a flowchart
41

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