MCHC908GR8AMFAE Freescale Semiconductor, MCHC908GR8AMFAE Datasheet - Page 31

• Manufacturer Part Number: MCHC908GR8AMFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AMFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
$000D
$000E
$000F
$0010
$0011
$0012
$0013
$0014
$0015
$0016
$0017
Addr.
Port A Input Pullup Enable
Port C Input Pullup Enable
Port D Input Pullup Enable
SPI Status and Control
Register Name
SCI Control Register 1
SCI Control Register 2
SCI Control Register 3
SCI Status Register 1
SCI Status Register 2
SPI Control Register
Register (PTAPUE)
Register (PTCPUE)
Register (PTDPUE)
Register (SPSCR)
SPI Data Register
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Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 7)
(SPCR)
(SPDR)
(SCC1)
(SCC2)
(SCC3)
(SCS1)
(SCS2)
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
LOOPS
SPRIE
SCTIE
SPRF
SCTE
Bit 7
R7
R8
T7
U
0
0
0
0
0
0
0
0
0
0
1
0
0
= Unimplemented
PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
ERRIE
ENSCI
TCIE
R6
TC
T6
T8
R
6
0
0
0
0
0
0
0
0
0
0
1
0
0
SPMSTR
TXINV
SCRIE
OVRF
SCRF
R5
T5
R
5
0
0
0
0
0
1
0
0
0
0
0
0
0
R = Reserved
MODF
CPOL
Unaffected by reset
IDLE
ILIE
R4
T4
M
R
4
0
0
0
0
0
0
0
0
0
0
0
0
0
PTAPUE3
WAKE
CPHA
SPTE
ORIE
OR
R3
TE
T3
3
0
0
0
0
1
1
0
0
0
0
0
0
U = Unaffected
PTAPUE2
MODFEN
SPWOM
NEIE
ILTY
R2
RE
NF
T2
Input/Output (I/O) Section
2
0
0
0
0
0
0
0
0
0
0
0
0
PTCPUE1 PTCPUE0
PTAPUE1
SPR1
RWU
FEIE
SPE
PEN
BKF
R1
FE
T1
1
0
0
0
0
0
0
0
0
0
0
PTAPUE0
SPTIE
SPR0
PEIE
Bit 0
SBK
RPF
PTY
PE
R0
T0
0
0
0
0
0
0
0
0
0
0
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