MCHC908GR8AMFAE Freescale Semiconductor, MCHC908GR8AMFAE Datasheet - Page 33

• Manufacturer Part Number: MCHC908GR8AMFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AMFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
Addr.
$002C
$002A
$002B
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
Timer 1 Channel 0 Status and
Timer 1 Channel 1 Status and
Timer 2 Status and Control
Control Register (T1SC0)
Control Register (T1SC1)
Register High (T1MODH)
Register High (T2CNTH)
Register Low (T1MODL)
Register High (T1CH0H)
Register High (T1CH1H)
Timer 1 Counter Modulo
Timer 1 Counter Modulo
Register Low (T1CNTL)
Register Low (T1CH0L)
Register Low (T1CH1L)
Register Name
Timer 1 Channel 0
Timer 1 Channel 0
Timer 1 Channel 1
Timer 1 Channel 1
Timer 1 Counter
Register (T2SC)
Timer 2 Counter
See page 210.
See page 211.
See page 211.
See page 214.
See page 214.
See page 214.
See page 214.
See page 214.
See page 214.
See page 211.
See page 210.
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 7)
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Bit 15
CH0F
Bit 15
CH1F
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
TOF
0
1
1
0
0
0
0
0
0
0
= Unimplemented
CH0IE
CH1IE
TOIE
14
14
14
14
6
6
0
1
6
1
0
6
0
6
0
0
TSTOP
MS0B
13
13
13
13
5
5
0
1
5
1
0
5
0
0
5
1
0
R = Reserved
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
MS1A
MS0A
TRST
12
12
12
12
4
4
0
1
4
1
0
4
0
4
0
0
0
ELS0B
ELS1B
11
11
11
11
3
3
0
1
3
1
0
3
0
3
0
0
0
U = Unaffected
ELS0A
ELS1A
PS2
10
10
10
10
Input/Output (I/O) Section
2
2
0
1
2
1
0
2
0
2
0
0
TOV1
TOV0
PS1
1
1
0
9
1
1
1
0
9
1
0
9
1
0
9
0
CH0MAX
CH1MAX
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
PS0
0
1
1
0
0
0
0
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