R5F21257SYFP#U0 Renesas Electronics America, R5F21257SYFP#U0 Datasheet - Page 154
![MCU 2KB FLASH 48K 52-LQFP](/photos/28/61/286101/52-lqfp_sml.jpg)
R5F21257SYFP#U0
Manufacturer Part Number
R5F21257SYFP#U0
Description
MCU 2KB FLASH 48K 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Specifications of R5F21257SYFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 105°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.2
Timer RA Control Register
Timer RA I/O Control Register
b7 b6 b5 b4
NOTES:
b7 b6 b5 b4 b3 b2
1.
2.
3.
4.
5.
Refer to 14.1.6 Notes on Tim er RA.
When the TSTOP bit is set to 1, bits TSTART and TCSTF and registers TPRAPRE and TRA are set to the values after
a reset.
Bits TEDGF and TUNDF can be set to 0 by w riting 0 to these bits by a program. How ever, their value remains
unchanged w hen 1 is w ritten.
In pulse w idth measurement mode and pulse period measurement mode, use the MOV instruction to set the TRACR
register. If it is necessary to avoid changing the values of bits TEDGF and TUNDF, w rite 1 to them.
Set to 0 in timer mode, pulse output mode, and event counter mode.
Feb 29, 2008
b3 b2
Registers TRACR and TRAIOC
b1 b0
b1 b0
Bit Symbol
Bit Symbol
TEDGSEL
TSTART
TRAIOC
(b7-b6)
TOENA
TIOSEL
(b7-b6)
Symbol
TRACR
TSTOP
TEDGF
TUNDF
Symbol
TOPCR
TCSTF
TIPF0
TIPF1
(b3)
Page 135 of 485
—
—
—
(4)
Timer RA count start bit
Timer RA count status flag
Timer RA count forcible stop
bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Active edge judgment
flag
Timer RA underflow flag
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
TRAIO polarity sw itch bit
TRAIO output control bit
TRAO output enable bit
_____
INT1
TRAIO input filter select bits
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
(2)
(3, 5)
/TRAIO select bit
Address
Bit Name
Address
Bit Name
0101h
0100h
(1)
(3, 5)
(1)
Function varies depending on operating mode.
0 : Count stops
1 : Count starts
0 : Count stops
1 : During count
When this bit is set to 1, the count is forcibly
stopped. When read, its content is 0.
0 : Active edge not received
1 : Active edge received
0 : No underflow
1 : Underflow
(end of measurement period)
After Reset
After Reset
Function
Function
00h
00h
14. Timers
RW
RW
RW
RW
RW
RO
RW
RW
RW
RW
RW
RW
—
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