R5F21257SYFP#U0 Renesas Electronics America, R5F21257SYFP#U0 Datasheet - Page 514
![MCU 2KB FLASH 48K 52-LQFP](/photos/28/61/286101/52-lqfp_sml.jpg)
R5F21257SYFP#U0
Manufacturer Part Number
R5F21257SYFP#U0
Description
MCU 2KB FLASH 48K 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Specifications of R5F21257SYFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 105°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Rev.
1.00
REVISION HISTORY
May 31, 2006
Date
Page
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97
14.1.1.1 Timer Write Control during Count added
Table 10.4 Interrupts to Exit Stop Mode and Usage Conditions revised
Figure 10.13 Time between Stop Mode and Interrupt Routine Execution
added
10.6.1 How to Use Oscillation Stop Detection Function revised
Figure 10.15 Procedure for Switching Clock Source from Low-Speed
On-Chip Oscillator to XIN Clock revised
Figure 10.16 Example of Determining Interrupt Source for Oscillation
Stop Detection, Watchdog Timer, Voltage Monitor 1, or Voltage Monitor 2
Interrupt revised
10.7.1 Stop Mode and Wait Mode revised and 10.7.4 fOCO40M deleted
Figure 12.1 Interrupts revised
Table 12.5 IPL Value When Software or Special Interrupt Is
Acknowledged revised
Figure 12.10 Priority Levels of Hardware Interrupts revised
12.6.7 Entering Wait Mode after Oscillation Stop Detection Interrupt is
Detected deleted
Figure 13.1 Block Diagram of Watchdog Timer revised
Figure 13.2 Registers OFS and WDC; OFS Register NOTE2 revised
14. Timers; “The count source for each timer ... and reloading.” deleted
14.1 Timer RA; “The count source for timer RA ... and reloading.” added
Figure 14.1 Block Diagram of Timer RA revised
Figure 14.2 Registers TRACR and TRAIOC revised
Figure 14.3 Registers TRAMR, TRAPRE, and TRA revised
Table 14.2 Timer Mode Specifications revised
Figure 14.4 TRAIOC Register in Timer Mode revised
Figure 14.5 Operating Example of Timer RA when Count Value is
Rewritten during Count added
Table 14.3 Pulse Output Mode Specifications revised
Figure 14.6 TRAIOC Register in Pulse Output Mode revised
Table 14.4 Event Counter Mode Specifications revised
Figure 14.7 TRAIOC Register in Event Counter Mode revised
Table 14.5 Pulse Width Measurement Mode Specifications revised
R8C/24 Group, R8C/25 Group Hardware Manual
(Figure 14.4 TRACR Register in Timer Mode deleted, Figure 14.5
Registers TRAIOC and TRAMR in Timer Mode TRAMR register deleted)
(Figure 14.6 Registers TRACR and TRAIOC in Pulse Output Mode TRACR
register deleted, Figure 14.7 TRAMR Register in Pulse Output Mode deleted)
(Figure 14.8 Registers TRACR and TRAIOC in Event Counter Mode
TRACR register deleted, Figure 14.9 TRAMR Register in Event
Counter Mode deleted)
C - 10
Description
Summary
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