R5F21257SYFP#U0 Renesas Electronics America, R5F21257SYFP#U0 Datasheet - Page 483
![MCU 2KB FLASH 48K 52-LQFP](/photos/28/61/286101/52-lqfp_sml.jpg)
R5F21257SYFP#U0
Manufacturer Part Number
R5F21257SYFP#U0
Description
MCU 2KB FLASH 48K 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Specifications of R5F21257SYFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 105°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
21.3.3.4
21.3.3.5
21.3.3.6
21.3.3.7
Change procedure
Change procedure
Change procedure
Change procedure: When setting to complementary PWM mode (including re-set), or changing the transfer
Change procedure: When stopping complementary PWM mode
•
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
•
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait 2 or more cycles of f1.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator stops).
•
•
•
•
(1) Set the TSTART0 bit in the TRDSTR register to 0 (count stops).
(2) Set bits CMD1 to CMD0 in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3 mode).
(3) Set bits CMD1 to CMD0 to 01b (reset synchronous PWM mode).
(4) Set the other registers associated with timer RD again.
•
•
(1) Set both the TSTART0 and TSTART1 bits in the TRDSTR register to 0 (count stops).
(2) Set bits CMD1 to CMD0 in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3 mode).
(3) Set bits CMD1 to CMD0 to 10b or 11b (complementary PWM mode).
(4) Set the registers associated with other timer RD again.
(1) Set both the TSTART0 and TSTART1 bits in the TRDSTR register to 0 (count stops).
(2) Set bits CMD1 to CMD to 00b (timer mode, PWM mode, and PWM3 mode).
•
Feb 29, 2008
Switch the count source after the count stops.
When changing the count source from fOCO40M to another source and stopping fOCO40M, wait 2 cycles
of f1 or more after setting the clock switch, and then stop fOCO40M.
Set the pulse width of the input capture signal to 3 or more cycles of the timer RD operation clock (refer to
Table 14.11 Timer RD Operation Clocks).
The value in the TRDi register is transferred to the TRDGRji register 2 to 3 cycles of the timer RD
operation clock after the input capture signal is applied to the TRDIOji pin (i = 0 or 1, j = either A, B, C, or
D) (no digital filter).
When reset synchronous PWM mode is used for motor control, make sure OLS0 = OLS1.
Set to reset synchronous PWM mode by the following procedure:
When complementary PWM mode is used for motor control, make sure OLS0 = OLS1.
Change bits CMD1 to CMD0 in the TRDFCR register in the following procedure.
Do not write to TRDGRA0, TRDGRB0, TRDGRA1, or TRDGRB1 register during operation.
When changing the PWM waveform, transfer the values written to registers TRDGRD0, TRDGRC1, and
TRDGRD1 to registers TRDGRB0, TRDGRA1, and TRDGRB1 using the buffer operation.
However, to write data to the TRDGRD0, TRDGRC1, or TRDGRD1 register, set bits BFD0, BFC1, and
BFD1 to 0 (general register). After this, bits BFD0, BFC1, and BFD1 may be set to 1 (buffer register).
The PWM period cannot be changed.
Count Source Switch
Input Capture Function
Reset Synchronous PWM Mode
Complementary PWM Mode
timing from the buffer register to the general register in complementary PWM mode.
Page 464 of 485
21. Usage Notes
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