R5F21257SYFP#U0 Renesas Electronics America, R5F21257SYFP#U0 Datasheet - Page 253
![MCU 2KB FLASH 48K 52-LQFP](/photos/28/61/286101/52-lqfp_sml.jpg)
R5F21257SYFP#U0
Manufacturer Part Number
R5F21257SYFP#U0
Description
MCU 2KB FLASH 48K 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Specifications of R5F21257SYFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 105°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.83
Table 14.30
BFC0, BFD0, BFC1, BFD1: Bits in TRDMR register
TRDGRA0
TRDGRB0
TRDGRC0
TRDGRD0
TRDGRA1
TRDGRB1
TRDGRC1
TRDGRD1
TRDGRC0
TRDGRD0
TRDGRC1
TRDGRD1
Timer RD General Registers Ai, Bi, Ci, and Di (i = 0 or 1)
(b15)
b7
NOTE:
Register
1.
The following registers are disabled in the reset synchronous PWM mode: TRDPMR, TRDOCR, TRDDF0,
TRDDF1, TRDIORA0, TRDIORC0, TRDPOCR0, TRDIORA1, TRDIORC1, and TRDPOCR1.
Access registers TRDGRAi to TRDGRDi in 16-bit units. Do not access them in 8-bit units.
Feb 29, 2008
Registers TRDGRAi, TRDGRBi, TRDGRCi, and TRDGRDi in Reset Synchronous PWM Mode
TRDGRji Register Functions in Reset Synchronous PWM Mode
(b8)
b0
BFC0 = 0
−
−
BFD0 = 0
−
−
BFC1 = 0
BFD1 = 0
BFC0 = 1
BFD0 = 1
BFC1 = 1
BFD1 = 1
b7
Setting
Refer to Table 14.30 TRDGRji Register Functions in Reset Synchronous PWM Mode.
Page 234 of 485
General register. Set the PWM period.
General register. Set the changing point of
PWM1 output.
(These registers are not used in reset
synchronous PWM mode.)
General register. Set the changing point of
PWM2 output.
General register. Set the changing point of
PWM3 output.
(These points are not used in reset
synchronous PWM mode.)
Buffer register. Set the next PWM period.
(Refer to 14.3.2 Buffer Operation.)
Buffer register. Set the changing point of
the next PWM1 output.
(Refer to 14.3.2 Buffer Operation.)
Buffer register. Set the changing point of
the next PWM2 output.
(Refer to 14.3.2 Buffer Operation.)
Buffer register. Set the changing point of
the next PWM3 output.
(Refer to 14.3.2 Buffer Operation.)
b0
TRDGRA0
TRDGRA1
TRDGRB0
TRDGRC0
TRDGRD0
TRDGRB1
TRDGRC1
TRDGRD1
Symbol
Register Function
Function
(1)
014Bh-014Ah
015Bh-015Ah
014Dh-014Ch
015Dh-015Ch
0149h-0148h
014Fh-014Eh
0159h-0158h
015Fh-015Eh
Address
(Output inverted every PWM
period and TRDIOC0 pin)
TRDIOB0
TRDIOD0
−
TRDIOA1
TRDIOC1
TRDIOB1
TRDIOD1
−
(Output inversed every PWM
period and TRDIOC0 pin)
TRDIOB0
TRDIOD0
TRDIOA1
TRDIOC1
TRDIOB1
TRDIOD1
PWM Output Pin
After Reset
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
14. Timers
RW
RW
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