MCF51EM256CLK Freescale Semiconductor, MCF51EM256CLK Datasheet - Page 112

IC MCU 32BIT 256KB FLASH 80LQFP

MCF51EM256CLK

Manufacturer Part Number
MCF51EM256CLK
Description
IC MCU 32BIT 256KB FLASH 80LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLK

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
56
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x16b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MCF51EM256CLK
Quantity:
49
Parallel Input/Output Control
provides functionality similar to standard GPIO equipped with SET/CLEAR/TOGGLE functionality, but
at CPU (rather than peripheral bus clock) rates. Standard GPIO are present on these pins for consistancy
and code compatibility issues, but RGPIO will normally respond faster.
Port A is associated with RGPIO[7:0].
Port B is associated with RGPIO[15:8].
See
4.1.3
Several of the Port B and C pins are associated with keyboard interrupt capability.
show KBI pin mapping to the port I/O pins.
4.1.4
Many port pins are shared with on-chip peripherals such as timer systems, communication systems, or
keyboard interrupts as shown in
Mux Control (MC) registers. These are defined in detail in
4.1.5
4.1.5.1
After reset, the shared peripheral functions are normally disabled and the pins are configured as inputs
(PTxDD[n] = 0). The pin control functions for each pin are configured as follows: slew rate control
4-2
RGPIO pin
RGPIO pin
Por
KBI2 to GPIO
Port pin
Port pin
Port pin
Port pin
KBI pin
KBI pin
Chapter 5, “Rapid GPIO (RGPIO),”
Keyboard Functions
Port Mux Control
Special Cases
RGPIO15
Pullup Resistors
RGPIO7
KBI1P7
KBI2P7
PTB7
PTC1
PTD7
PTA7
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
RGPIO14
RGPIO6
KBI1P6
KBI2P6
PTC0
PTD6
PTB6
PTA6
Figure
Table 4-4. KBI1 to GPIO Port Mapping
Table 4-5. KBI2 to GPIO Port Mapping
Table 4-2. Port A to RGPIO Mapping
Table 4-3. Port B to RGPIO Mapping
RGPIO13
RGPIO5
KBI1P5
KBI2P5
PTB5
PTB7
PTD5
PTA5
Table 4-2
1-1. The user may select which function “owns” a pin via the Port
Table 4-3
for additional details.
RGPIO12
RGPIO4
shows RGPIO pin mapping to the port I/O pins.
KBI1P4
KBI2P4
PTD4
PTB4
PTB6
PTA4
shows RGPIO pin mapping to the port I/O pins.
Section 4.7, “Pin Mux
RGPIO11
RGPIO3
KBI1P3
KBI2P3
PTB3
PTB3
PTD3
PTA3
RGPIO10
RGPIO2
KBI1P2
KBI2P2
PTB2
PTB2
PTD2
PTA2
Table 4-4
Controls.”
Freescale Semiconductor
RGPIO1
RGPIO9
KBI1P1
KBI2P1
PTD1
PTB1
PTB1
PTA1
and
Table 4-5
RGPIO8
RGPIO0
KBI1P0
KBI2P0
PTB0
PTB0
PTD0
PTA0

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