MCF51EM256CLK Freescale Semiconductor, MCF51EM256CLK Datasheet - Page 71

• Manufacturer Part Number: MCF51EM256CLK
• Description: IC MCU 32BIT 256KB FLASH 80LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLK

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x16b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
0x(FF)FF_84A7–
0x(FF)FF_848C
0x(FF)FF_848D
0x(FF)FF_849C
0x(FF)FF_849D
0x(FF)FF_84BF
0x(FF)FF_84C0
0x(FF)FF_84C1
0x(FF)FF_848A
0x(FF)FF_848B
0x(FF)FF_848E
0x(FF)FF_848F
0x(FF)FF_8490
0x(FF)FF_8491
0x(FF)FF_8492
0x(FF)FF_8493
0x(FF)FF_8494
0x(FF)FF_8495
0x(FF)FF_8496
0x(FF)FF_8497
0x(FF)FF_8498
0x(FF)FF_8499
0x(FF)FF_849A
0x(FF)FF_849B
0x(FF)FF_849E
0x(FF)FF_849F
0x(FF)FF_84A0
0x(FF)FF_84A1
0x(FF)FF_84A2
0x(FF)FF_84A3
0x(FF)FF_84A4
0x(FF)FF_84A5
0x(FF)FF_84A6
Address
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
ADC3CLM4H
ADC3CLM4L
ADC3CLM3H
ADC3CLM3L
ADC3CLP4H
ADC3CLP3H
ADC3CLP4L
ADC3CLP3L
ADC3CLMD
ADC3CLMS
ADC3OFSH
ADC3CLPD
ADC3CLM2
ADC3CLM1
ADC3CLM0
ADC3CV2H
ADC3CV2L
ADC3OFSL
ADC3CLPS
ADC3CLP2
ADC3CLP1
ADC3CLP0
ADC4SC1A
ADC4SC1B
ADC3MGH
ADC3PGH
ADC3MGL
ADC3PGL
ADC3SC2
ADC3SC3
Reserved
Reserved
Name
Table 3-3. Detailed Peripheral Memory Map (Sheet 11 of 22)
COCOA
COCOB
ADACT
Bit 7
CAL
—
—
0
0
0
0
0
0
0
0
0
0
0
0
ADTRG
AIENA
AIENB
CAF
—
—
6
0
0
0
0
0
0
0
0
0
0
DIFFB
DIFFA
ACFE
—
—
5
0
0
0
0
0
ACFGT
—
—
4
0
0
0
0
0
CLM4[7:0]
CLM3[7:0]
CLM2[7:0]
CV2[15:8]
OFS[15:8]
CLP4[7:0]
CLP3[7:0]
CLP2[7:0]
CV2[[7:0]
MG[15:8]
OFS[7:0]
PG[15:8]
MG[7:0]
PG[7:0]
CLM1[6:0]
CLP1[6:0]
ACREN
ADCO
—
—
3
0
0
0
0
CLMD[5:0]
CLMS[5:0]
CLPD[5:0]
CLPS[5:0]
CLM0[5:0]
CLP0[5:0]
ADCHA
ADCHB
ADGE
—
—
2
0
0
0
0
0
—
—
1
0
0
CLM4[9:8]
CLP4[9:8]
REFSEL
AVGS
CLM3[8]
CLP3[8]
Memory
Bit 0
—
—
3-15