MCF51EM256CLK Freescale Semiconductor, MCF51EM256CLK Datasheet - Page 195

• Manufacturer Part Number: MCF51EM256CLK
• Description: IC MCU 32BIT 256KB FLASH 80LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLK

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x16b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

BDM Command
The supervisor programming model is to be used only by system control software to implement restricted
operating system functions, I/O control, and memory management. All accesses that affect the control
features of ColdFire processors are in the supervisor programming model, that consists of registers
available in user mode as well as the following control registers:
Freescale Semiconductor
Store: 0x48–E
Load: 0x68–E
Store: 0x4–7
Load: 0x6–7
Store: 0xCE
Store: 0xCF
Store: 0xC4
Store: 0xC5
Store: 0xC6
Store: 0xC0
Store: 0xC1
Store: 0xC2
Store: 0x40
Store: 0x41
Store: 0x4F
Load: 0xE4
Load: 0xE5
Load: 0xE6
Load: 0xEE
Load: 0xEF
Load: 0xE0
Load: 0xE1
Load: 0xE2
Load: 0x60
Load: 0x61
Load: 0x6F
•
•
•
•
16-bit status register (SR)
32-bit supervisor stack pointer (SSP)
32-bit vector base register (VBR)
32-bit CPU configuration register (CPUCR)
1
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
MAC Status Register (MACSR)
MAC Address Mask Register (MASK)
MAC Accumulator (ACC)
Condition Code Register (CCR)
Program Counter (PC)
Supervisor A7 Stack Pointer
(OTHER_A7)
Vector Base Register (VBR)
CPU Configuration Register (CPUCR)
Data Register 0 (D0)
Data Register 1 (D1)
Data Register –7 (D–D7)
Address Register 0–6 (A0–A6)
User A7 Stack Pointer (A7)
Register
Table 8-1. ColdFire Core Programming Model
Supervisor/User Access Registers
Supervisor Access Only Registers
Width
(bits)
32
32
32
32
32
16
32
32
32
32
32
8
8
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
POR: Undefined
Else: Unaffected
POR: Undefined
Else: Unaffected
POR: Undefined
Else: Unaffected
POR: Undefined
Else: Unaffected
POR: Undefined
Else: Unaffected
0x(00)00_0004
0x(00)00_0000
8.3.3.14/8-19
8.3.3.14/8-19
Reset Value
See section
See section
Contents of
Contents of
0xFFFF
location
location
0x00
See
See
Written with
Rc = 0x801
Rc = 0x802
MOVEC
Yes;
Yes;
No
No
No
No
No
No
No
No
No
No
No
2
ColdFire Core
Section/Page
8.2.1/8-4
8.2.1/8-4
8.2.1/8-4
8.2.2/8-4
8.2.3/8-5
9.2.1/9-2
9.2.2/9-4
9.2.3/9-5
8.2.4/8-5
8.2.5/8-6
8.2.3/8-5
8.2.6/8-7
8.2.7/8-7
8-3