MCF51EM256CLK Freescale Semiconductor, MCF51EM256CLK Datasheet - Page 505

• Manufacturer Part Number: MCF51EM256CLK
• Description: IC MCU 32BIT 256KB FLASH 80LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLK

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x16b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.2
22.2.1
The memory map of PDB will expand as the number of channels increases above 1. On MCF51EM256
series MCU has 4 channels built in the PDB. In
Note that the memory map extends four extra registers per PDB channel.
22.2.2
22.2.2.1
This register contains status and control bits for the Programmable Delay Block. The counter is enabled if
EN has been set to one.
Freescale Semiconductor
RESET:
W
R
Memory Map and Registers
0x00
0x02
0x04
0x06
0x08 + (n x
0x08)
0x08 + (n x
0x08) + 2
0x08 + (n x
0x08) + 4
0x08 + (n x
0x08) + 6
Offset (bytes)
15
0
Memory Map
Registers Descriptions
PRESCALER
PDB Status and Control Register (PDBSC)
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
14
0
= Reserved or unused
13
0
PDBSC
PDBMOD
PDBCNT
PDBIDLY
PDBCHnCR
PDBCHnDLYA
PDBCHnDLYB
Reserved
Figure 22-3. PDB Status and Control Register (PDBSC)
Register
12
0
11
0
RESERVED
Table 22-1. PDB Memory Map
PDB Status & Control Register
PDB Counter Modulus Register
PDB Counter Value (READ ONLY)
PDB Comparison Value for Interrupt Timer
PDB Channel n Control Register
PDB Channel n Delay A Register
PDB Channel n Delay B Register
Reserved
10
0
9
0
Table
8
0
22-1, n is the channel number for channel.
IF
7
0
Description
CON
T
6
0
TRIG
SW
5
0
4
0
Programmable Delay Block (PDB)
TRIGSEL
3
0
2
0
IE
1
0
EN
22-5
0
0