MCF51EM256CLK Freescale Semiconductor, MCF51EM256CLK Datasheet - Page 179

IC MCU 32BIT 256KB FLASH 80LQFP

MCF51EM256CLK

Manufacturer Part Number
MCF51EM256CLK
Description
IC MCU 32BIT 256KB FLASH 80LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLK

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
56
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x16b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MCF51EM256CLK
Quantity:
49
1
7.7.3
This high-page register contains status and control bits to configure the low power run and wait modes as
well as configure the stop mode behavior of the microcontroller. See
Mode (LPwait),”
SPMSC2 is not reset when exiting from stop2.
Freescale Semiconductor
PPDE is a write-once bit that can be used to permanently disable the PPDC bit.
Reset:
PPDACK
LPWUI
LPRS
PPDF
Field
LPR
7
6
5
4
3
2
W
R
System Power Management Status and Control 2 Register
(SPMSC2)
LPR
Low-Power Regulator Control. The LPR bit controls entry into the low-power run and low-power wait modes in
which the voltage regulator is put into standby. This bit cannot be set if PPDC=1. If PPDC and LPR are set in a
single write instruction, only PPDC is actually set. LPR is cleared when an interrupt occurs in low-power mode
and the LPWUI bit is 1.
0 Low-power run and low-power wait modes are disabled.
1 Low-power run and low-power wait modes are requested.
Low-Power Regulator Status. This read-only status bit indicates that the voltage regulator has entered into
standby for the low-power run or wait mode.
0 The voltage regulator is not currently in standby.
1 The voltage regulator is currently in standby.
Low-Power Wake-Up on Interrupt. This bit controls whether or not the voltage regulator exits standby when any
active MCU interrupt occurs.
0 The voltage regulator remains in standby on an interrupt.
1 The voltage regulator exits standby on an interrupt. LPR is cleared.
RESERVED
Partial Power-Down Flag — This read-only status bit indicates that the microcontroller has recovered from stop2
mode.
0 Microcontroller has not recovered from stop2 mode.
1 Microcontroller recovered from stop2 mode.
Partial Power-Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit.
Figure 7-3. System Power Management Status and Control 2 Register (SPMSC2)
0
7
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
for more information.
LPRS
0
6
Table 7-6. SPMSC2 Bit Field Descriptions
LPWUI
0
5
0
0
4
Description
PPDF
3
Resets, Interrupts, and General System Control
Section 6.7.2, “Low-Power Wait
PPDACK
0
0
2
PPDE
0
1
1
PPDC
0
0
7-13

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