DF36054GFPJ Renesas Electronics America, DF36054GFPJ Datasheet - Page 19

• Manufacturer Part Number: DF36054GFPJ
• Description: MCU 3/5V 32K J-TEMP POR&LVD 64-Q
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36054GFPJ

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F36054GFPJ; HD64F36054GFPJ

16.5
Section 17 Subsystem Timer (Subtimer) ...........................................................379
17.1
17.2
17.3
17.4
17.5
Section 18 A/D Converter..................................................................................391
18.1
18.2
18.3
18.4
18.5
18.6
Section 19 Power-On Reset and Low-Voltage Detection Circuits
19.1
19.2
19.3
16.4.11 Interrupt Requests ............................................................................................. 377
Usage Note........................................................................................................................ 378
Features............................................................................................................................. 379
Register Descriptions........................................................................................................ 381
17.2.1
17.2.2
17.2.3
Operation .......................................................................................................................... 383
17.3.1
Count Operation................................................................................................................ 387
Usage Notes ...................................................................................................................... 390
17.5.1
17.5.2
Features............................................................................................................................. 391
Input/Output Pins.............................................................................................................. 393
Register Descriptions........................................................................................................ 394
18.3.1
18.3.2
18.3.3
Operation .......................................................................................................................... 397
18.4.1
18.4.2
18.4.3
18.4.4
A/D Conversion Accuracy Definitions ............................................................................. 400
Usage Notes ...................................................................................................................... 402
18.6.1
18.6.2
Features............................................................................................................................. 404
Register Descriptions........................................................................................................ 405
19.2.1
19.2.2
Operation .......................................................................................................................... 408
(Optional).........................................................................................403
Subtimer Control Register (SBTCTL) .............................................................. 381
Subtimer Counter (SBTDCNT) ........................................................................ 382
Ring Oscillator Prescaler Setting Register (ROPCR) ....................................... 382
SBTPS Division Ratio Setting .......................................................................... 383
Clock Supply to Watchdog Timer .................................................................... 390
Writing to ROPCR............................................................................................ 390
A/D Data Registers A to D (ADDRA to ADDRD) .......................................... 394
A/D Control/Status Register (ADCSR) ............................................................ 395
A/D Control Register (ADCR) ......................................................................... 396
Single Mode...................................................................................................... 397
Scan Mode ........................................................................................................ 397
Input Sampling and A/D Conversion Time ...................................................... 398
External Trigger Input Timing.......................................................................... 399
Permissible Signal Source Impedance .............................................................. 402
Influences on Absolute Accuracy ..................................................................... 402
Low-Voltage-Detection Control Register (LVDCR)........................................ 405
Low-Voltage-Detection Status Register (LVDSR)........................................... 407
Rev. 4.00 Mar. 15, 2006 Page xvii of xxxii