DF36054GFPJ Renesas Electronics America, DF36054GFPJ Datasheet - Page 388

• Manufacturer Part Number: DF36054GFPJ
• Description: MCU 3/5V 32K J-TEMP POR&LVD 64-Q
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36054GFPJ

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F36054GFPJ; HD64F36054GFPJ

Section 16 Synchronous Serial Communication Unit (SSU)
16.3.3
SSMR is a register that selects MSB-first or LSB-first, clock polarity, clock phase, and transfer
clock rate.
Rev. 4.00 Mar. 15, 2006 Page 354 of 556
REJ09B0026-0400
Bit
3
2 to 0
Bit
7
6
5
4, 3
Bit Name
CSOS
Bit Name
MLS
CPOS
CPHS
SS Mode Register (SSMR)
Initial
Value
0
All 0
Initial
Value
0
0
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
Description
SCS Pin Open-Drain Output Select
Selects whether the SCS pin functions as CMOS output
or NMOS open-drain output.
0: CMOS output
1: NMOS open-drain output
Reserved
These bits are always read as 0.
Description
Selects whether data transfer is performed in MSB-first or
LSB-first.
Clock Polarity Select
Selects the clock polarity of SSCK.
0: Idle state = high
1: Idle state = low
Clock Phase Select
Selects the clock phase of SSCK.
0: Data change at first edge
1: Data latch at first edge
Reserved
These bits are always read as 0.
MSB-First/LSB-First Select
0: LSB-first
1: MSB-first