COP8CCR9IMT8/NOPB National Semiconductor, COP8CCR9IMT8/NOPB Datasheet - Page 4

• Manufacturer Part Number: COP8CCR9IMT8/NOPB
• Description: IC MCU EEPROM 8BIT 32K 48-TSSOP
• Manufacturer: National Semiconductor
• Series: COP8™ 8Cr

Specifications of COP8CCR9IMT8/NOPB

• Core Processor: COP8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: Microwire/Plus (SPI), UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSSOP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 1 KB
• On-chip Adc: 10 bit, 16 channel
• Number Of Programmable I/os: 59
• Number Of Timers: 3
• Height: 0.9 mm
• Interface Type: SPI, USART
• Length: 12.5 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 6.1 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: *COP8CCR9IMT8; *COP8CCR9IMT8/NOPB; COP8CCR9IMT8

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13.0 Power Saving Features ............................................................................................................................ 38
14.0 USART ..................................................................................................................................................... 45
15.0 A/D Converter ........................................................................................................................................... 51
12.1 TIMER T0 (IDLE TIMER) ...................................................................................................................... 35
12.2 TIMER T1, TIMER T2, AND TIMER T3 ................................................................................................ 36
12.3 TIMER CONTROL FLAGS .................................................................................................................... 38
13.1 POWER SAVE MODE CONTROL REGISTER .................................................................................... 39
13.2 OSCILLATOR STABILIZATION ............................................................................................................. 40
13.3 HIGH SPEED MODE OPERATION ...................................................................................................... 40
13.4 DUAL CLOCK MODE OPERATION ...................................................................................................... 42
13.5 LOW SPEED MODE OPERATION ....................................................................................................... 43
13.6 MULTI-INPUT WAKE-UP ...................................................................................................................... 45
14.1 USART CONTROL AND STATUS REGISTERS ................................................................................... 46
14.2 DESCRIPTION OF USART REGISTER BITS ...................................................................................... 46
14.3 ASSOCIATED I/O PINS ........................................................................................................................ 47
14.4 USART OPERATION ............................................................................................................................ 48
14.5 FRAMING FORMATS ............................................................................................................................ 48
14.6 USART INTERRUPTS .......................................................................................................................... 49
14.7 BAUD CLOCK GENERATION .............................................................................................................. 49
14.8 EFFECT OF HALT/IDLE ....................................................................................................................... 51
14.9 DIAGNOSTIC ........................................................................................................................................ 51
14.10 ATTENTION MODE ............................................................................................................................. 51
14.11 BREAK GENERATION ........................................................................................................................ 51
15.1 OPERATING MODES ........................................................................................................................... 52
15.2 A/D OPERATION ................................................................................................................................... 55
12.1.1 ITMR Register .................................................................................................................................. 36
12.2.1 Timer Operating Speeds .................................................................................................................. 36
12.2.2 Mode 1. Processor Independent PWM Mode ................................................................................. 36
12.2.3 Mode 2. External Event Counter Mode ........................................................................................... 37
12.2.4 Mode 3. Input Capture Mode .......................................................................................................... 37
13.3.1 High Speed Halt Mode .................................................................................................................... 40
13.3.2 High Speed Idle Mode ..................................................................................................................... 41
13.4.1 Dual Clock HALT Mode ................................................................................................................... 42
13.4.2 Dual Clock Idle Mode ...................................................................................................................... 42
13.5.1 Low Speed HALT Mode ................................................................................................................... 43
13.5.2 Low Speed Idle Mode ...................................................................................................................... 44
14.4.1 Asynchronous Mode ........................................................................................................................ 48
14.4.2 Synchronous Mode .......................................................................................................................... 48
15.1.1 A/D Control Register ........................................................................................................................ 52
15.1.2 A/D Result Registers ....................................................................................................................... 54
15.2.1 Prescaler .......................................................................................................................................... 55
13.3.1.1 Entering The High Speed Halt Mode ......................................................................................... 40
13.3.1.2 Exiting The High Speed Halt Mode ........................................................................................... 40
13.3.1.3 HALT Exit Using Reset .............................................................................................................. 40
13.3.1.4 HALT Exit Using Multi-Input Wake-up ....................................................................................... 40
13.3.1.5 Options ....................................................................................................................................... 41
13.4.1.1 Entering The Dual Clock Halt Mode .......................................................................................... 42
13.4.1.2 Exiting The Dual Clock Halt Mode ............................................................................................. 42
13.4.1.3 HALT Exit Using Reset .............................................................................................................. 42
13.4.1.4 HALT Exit Using Multi-Input Wake-up ....................................................................................... 42
13.4.1.5 Options ....................................................................................................................................... 42
13.5.1.1 Entering The Low Speed Halt Mode ......................................................................................... 43
13.5.1.2 Exiting The Low Speed Halt Mode ............................................................................................ 43
13.5.1.3 HALT Exit Using Reset .............................................................................................................. 43
13.5.1.4 HALT Exit Using Multi-Input Wake-up ....................................................................................... 43
13.5.1.5 Options ....................................................................................................................................... 43
15.1.1.1 Channel Select ........................................................................................................................... 52
15.1.1.2 Multiplexor Output Select ........................................................................................................... 53
15.1.1.3 Mode Select ............................................................................................................................... 54
15.1.1.4 Prescaler Select ......................................................................................................................... 54
15.1.1.5 Busy Bit ...................................................................................................................................... 54
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